SIGNAL WIRING DIAGRAMS in Font

Encoder QR-Code in Font SIGNAL WIRING DIAGRAMS

Figure 7-36. A component with internal objects that handle signals When a group of signals enters or leaves a component, and it isn t important to describe each signal separately, you can use a bus, as described in the next section.

To simplify diagrams in which there are lots of wires going from one place to another, you can group wires together into something called a bus, borrowing the term from the hardware world. The term bus has been used extensively in the software world to connote an infrastructure for connecting objects and components in various ways. Examples of bus technologies are CORBA,8 Ivy,9 SWBus,10 Java iBus,11 Polylith,12 the Eureka Software Factory,13 and ToolBus.14 Architecture Description Languages use abstractions that are logically equivalent to buses. These abstractions are called connectors by a number of ADLs, such as ACME,15 Aesop,16 C2,17 UniCon,18 and Wright.19 The Darwin ADL calls the interconnection abstraction a binding.

8. Object Management Group, Common Object Request Broker Architecture: Core Specification, www.omg.org/ docs/formal/02-12-06.pdf, 2002. 9. Stephane Chatty, The Ivy Software Bus (white paper, www.tls.cena.fr/products/ivy/documentation/ ivy.pdf, 2003). 10. SWBus Technical Overview, www2.hrp.no/swbus/overview/overview.html, 2000. 11. Silvano Maffeis, Components Need Software Bus Middleware (proceedings of the CHOOSE Forum on Object-Oriented Software Architecture, University of Bern, Bern, Switzerland, March 1999, www.riehle.org/ community-service/choose/1999-forum/maffeis.pdf ). 12. James M. Purtilo, The Polylith Software Bus, ACM Transactions on Programming Languages and Systems, January 1994. 13. Herbert Weber, The Software Factory Challenge: Results of the Eureka Software Factory Project (Amsterdam, The Netherlands: IOS Press, 1997). 14. J.A. Bergstra and Paul Klint, The Discrete Time ToolBus: A Software Coordination Architecture, Science of Computer Programming, July 1998. 15. David Garlan, Robert Monroe, and Dave Wile, Acme: An Architecture Description Interchange Language (proceedings of IBM Centers for Advanced Studies Conference, Toronto, Ontario, Canada, November 1997). For a relevant excerpt, also see An Overview of Acme, www-2.cs.cmu.edu/~acme/language_overview.html 16. The Acme Architectural Description Language, www-2.cs.cmu.edu/~acme. 17. Nenad Medvidovic, David S. Rosenblum, and Richard N.Taylor, A Language and Environment for ArchitectureBased Software Development and Evolution (proceedings of the 21st International Conference on Software Engineering, Los Angeles, CA, May 1999). 18. Mary Shaw, Robert DeLine, and Gregory Zelesnik, Abstractions and Implementations for Architectural Connections (proceedings of the Third International Conference on Configurable Distributed Systems, Annapolis, MD, May 1996). 19. Robert J. Allen and David Garlan, A Formal Basis for Architectural Connection, ACM Transactions on Software Engineering and Methodology, July 1997.

Wiring diagram buses represent a logical or physical path containing a group of signals. Figure 7-37 shows a simple bus.

Figure 7-37. A bus, with two signals entering and two leaving Where a wire joins a bus, draw a short bus branch at a 45-degree angle to the bus. On dense diagrams, the short line makes it easier to distinguish wires that cross over the bus from those that are connected to the bus. Signals are identified both entering and leaving the bus, with an arrow drawn close to the bus to indicate the signal s direction. Signals may enter or leave from both sides of the bus. Whether a bus is drawn vertically or horizontally is dictated only by aesthetic demands of the diagram. Figure 7-38 shows a bus that has both vertical and horizontal segments.

Figure 7-38. A bus with vertical and horizontal segments Signals grouped on a bus usually have something in common. Perhaps the signals originate in the same subsystem or serve collectively to achieve a common objective. The bus name should reflect what the signals have in common. When a signal leaving a bus has a short wire and goes to an input pin that is named, the signal name can sometimes be omitted, as shown in Figure 7-39.