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SIGNAL nota, notb : std_logic; BEGIN I1 : inv PORT MAP( a, nota); I2 : inv PORT MAP( b, notb); AN1 : and3 PORT MAP( nota, en, notb, q0); AN2 : and3 PORT MAP( a, en, notb, q1); AN3 : and3 PORT MAP( nota, en, b, q2); AN4 : and3 PORT MAP( a, en, b, q3); END structural;
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Notice that the component declarations for components inv and and3 in the architecture declaration section do not contain the generics declared in the entity declarations for entities inv and and3 Because the generics are not being mapped in the architecture, there is no need to declare the generics for the components in the architecture Following is the configuration to bind all of these parts together into an executable model:
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CONFIGURATION decode_gen1_con OF decode IS FOR structural FOR I1 : inv USE ENTITY WORKinv(inv_gen1) GENERIC MAP( int_rise => 12 ns, GENERIC MAP( int_fall => 17 ns, GENERIC MAP( ext_rise => 26 ns, GENERIC MAP( ext_fall => 25 ns); END FOR; FOR I2 : GENERIC GENERIC GENERIC GENERIC END FOR; inv USE ENTITY WORKinv(inv_gen1) MAP( int_rise => 13 ns, MAP( int_fall => 14 ns, MAP( ext_rise => 28 ns, MAP( ext_fall => 29 ns);
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FOR AN1 : and3 USE ENTITY GENERIC MAP( int_rise => GENERIC MAP( int_fall => GENERIC MAP( ext_rise => GENERIC MAP( ext_fall => END FOR;
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WORKand3(and3_gen1) 22 ns, 27 ns, 36 ns, 35 ns);
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FOR AN2 : and3 USE ENTITY GENERIC MAP( int_rise => GENERIC MAP( int_fall => GENERIC MAP( ext_rise => GENERIC MAP( ext_fall => END FOR; FOR AN3 : and3 USE ENTITY GENERIC MAP( int_rise => GENERIC MAP( int_fall => GENERIC MAP( ext_rise => GENERIC MAP( ext_fall => END FOR; FOR AN4 : and3 USE ENTITY GENERIC MAP( int_rise => GENERIC MAP( int_fall => GENERIC MAP( ext_rise => GENERIC MAP( ext_fall => END FOR; END FOR; END decode_gen1_con;
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WORKand3(and3_gen1) 22 ns, 27 ns, 31 ns, 32 ns);
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WORKand3(and3_gen1) 22 ns, 27 ns, 33 ns, 34 ns);
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WORKand3(and3_gen1) 22 ns, 27 ns, 30 ns, 31 ns);
Each component instance is configured to the correct entity and architecture, and the generics of the entity are mapped with a generic map clause Using this type of configuration allows each instance to have unique delay characteristics Of course, the generics passed into the device can represent any type of data the designer wants, but typically the generics are used to represent delay information VITAL uses generics to pass delay information to library components We examine this more closely in later chapters The power of this type of configuration is realized when the delay values are updated For instance, in the ASIC example, the estimated delays are included in the configuration initially, but after the ASIC device has been through the physical layout process, the actual delay information can be determined This information can be fed back into the configuration so that the configuration has the actual delay information calculated from the layout tool Building a new simulatable device, including the new delay information, requires only a recompile of the configuration The entities and architectures do not need to be recompiled If the delay information was included in the architecture for the device, then a lot more of the model would need to be recompiled to build the simulatable entity All of the architectures that included the generics would need to be recompiled, and so would the configuration for the entity A lot of extra code would be recompiled unnecessarily
Configurations
The information in this section on generics can be summarized by the charts shown in Figures 7-3 and 7-4 (These charts were originally created by Paul Krol) These charts shows the effect of the declarations and mapping of generics on the values actually obtained in the model The first four columns of Figure 7-3 describe where a particular generic, G, can be declared and mapped to a value The next column describes the error/warning number returned from a particular combination of declaration and mapping The next two columns describe the values obtained by the generic, G, and any other generics for the entity for a particular declaration and mapping combination At the bottom of Figure 7-3 and in Figure 7-4, are the tables of translations used to translate the character values used to the appropriate action taken
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