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FIGURE 396
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Basic C-E circuit for bias stabilization calculation
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VCC VCC
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FIGURE 397
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Class A transistor ampli ers with (a) inductor load and (b) tank load
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As this ratio decreases, the beta variations stabilize (but the gain of the amplifier will also decrease) A RB/RE ratio of 10 or less will usually give a very stable beta design Class A amplifiers with either inductor or LC resonant tank collector loads (Fig 397) are able to have a lower VCC, and less power losses, than circuits employing a resistive load at the collector This is because the DC voltage drop across the collector load that uses an inductor is at a very low value, and is equal to the inductor s DC resistance Since the inductor or inductor/capacitor combination forces the average voltage to be approximately VCC at the transistor s collector, instead of around half the VCC when using a collector resistor, the RF output will swing 2 VCC above, and approximately 0 V below, this average VCC when the amplifier s input is driven hard This doubles the available RF voltage at the output of the transistor In designing small-signal amplifiers, the transistor s collector current does not necessarily have to be at the middle of its IC(MAX), since the stage will only be amplifying low signal levels The IC can be chosen to be in the most linear part of its characteristic curve, and at a low enough amplitude that DC power dissipation is at a minimum, but not so low that any RF signal will be too near cutoff, or at excess distortion levels, or where the stage gain will suffer However, most IC values, as well as VCE values, will be chosen to conform to the S-parameter files available for ease of design and simulation (It must also be kept in mind that after calculating the matching network of an amplifier with existing S-parameters, we must calculate the bias components with the exact same VCE and IC that were used to originally measure those S-parameters, and as are shown in the S2P text file, or the active device s port impedances will not be correct, since ZIN/ZOUT vary with changes in IC and VCE) Some lower-frequency RF amplifiers will split the single emitter feedback resistor into two separate emitter resistors (Fig 398), with only one of these resistors having an AC capacitor bypass, while the other one is providing constant degenerative feedback to enhance amplifier stability, reducing the chance of oscillations This also allows the
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RC VC
VE R4
RE R3 C4
FIGURE 398
Split emitter feedback for bias and gain stabilization
designer to solidly set the gain, irrespective of the transistor s varying batch-to-batch tolerances, to: R 20 log C = gain in dB R4
365 Amplifier Bias Design
There are many different ways to bias an amplifier, depending on the required temperature stability, efficiency, cost, device, power output, linearity, and so on The following are the most popular bias circuits and design methods Matching circuits not shown
Class AB Diode or Transistor Bias for Microwave Power Amplifiers of up to 3 W (Fig 399)
Because of the huge amount of wasted power caused by high PA currents that would be dissipated across any collector resistor, standard bias techniques cannot be used for most power amplifiers While there are highly complex active biasing schemes available, the two presented below are the most common and lowest in cost for < 3 W microwave/ RF power amplifier designs
To Design
1 RS = 5 2 CRF = < 2 at fr
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VCC RS
RVcc RS Q2 RV
RFC RS
FIGURE 399 Diode and transistor bias for power ampli ers
3 RFC = > 500 XL 4 CAC = > 1 uF 5 D1, Q2 = general purpose diode or transistor VCC 07 6 RV(CC) = I C ( MAX ) H FE(MIN) where VCC = supply voltage, V IC(MAX) = RF transistor s (Q3) maximum rated collector current, A HFE(MIN) = RF transistor s (Q3) minimum rated HFE
NOTE : Whether employing diode (D1) or transistor (Q2) bias, it is essential to thermally connect these components to the RF transistor itself This allows the semiconductor bias components to track the power amplifier s temperature variations, and thus increase/ decrease the 07 V placed across Q1 s base, maintaining the PA s collector current at a steady DC level (As the temperatures rise, a silicon semiconductor junction s voltage decreases from its room temperature value of 07 V) Since the bias components can only react to Q1 s case temperature, and not its die temperature, the bias will not be completely responsive to these temperature variations, nor will the thermal bonding to the PA be 100% efficient However, this simple bias topology will be more than adequate for low power microwave PA s, as typically found in consumer wireless equipment Further, in order to force PA bias stability no matter what the input and output RF power levels may be, the standing current through the diode or transistor bias components must be high enough to permit a steady voltage to be maintained across the PA s base We can guarantee this by following the above design procedure
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