Part II

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IDSS = k VT2 = 40

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mA (08)2 V2 = 256 mA V2

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Next, we calculate VGSQ using the equation for operation in the saturation region in Table 91: VGSQ = VT2 IDQ + VT = 33 V IDSS

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Since the conditions for saturation region operation are satis ed (vDS > vGS VT ; vGS > VT ), we can use the above result to calculate the desired resistances Applying KVL around the gate loop requires that: VGG = VGSQ + IDQ RS = 33 + 250RS while the drain circuit imposes the condition: VDD = VDSQ + IDQ (RD + RS ) = 10 + 250 (RD + RS ) or 25 = 10 + 250 (RD + RS ) (RD + RS ) = 006 k We select RD = 22 and RS = 39 (note that these are both standard 5 percent resistor values they add up to 61 , a small error) Then we can solve for VGG in the rst equation: VGG = 10 V To achieve the desired value of VGG we need to select resistors R1 and R2 such that VGG = R2 VDD = 1305 V R1 + R 2

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To formulate a problem with a unique solution, we can also (arbitrarily) impose the condition that RG = R1 ||R2 = 100 k Then we can solve the two equations to obtain: R1 = 196 k ; R2 = 209 k The nearest standard 5 percent resistor values are 180 k and 220 k , leading to an equivalent resistance RG = R1 ||R2 = 99 k Now we can compute the ampli er voltage and current gains from equations 1042 and 1047: V AV = gm (RD ||RL ) = 200 (0022||008) 35 V AI = gm RD R G RD + R L = 200 0022 99 0022 + 008 4300 A A

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Comments: Note that we assumed saturation region operation in calculating the

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quiescent gate-source voltage If the resulting calculation had yielded a value of VGSQ that did not match the conditions for active region operation (see Table 91), we would have had to recompute VGSQ using the ohmic region equations

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Focus on Computer-Aided Solutions: The calculations carried out in the present

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example may also be found in electronic form in a MathcadTM le in the accompanying CD-ROM

The MOSFET Source Follower FET source followers are commonly used as input stages to many common instruments, because of their very high input impedance A commonly used source follower is shown in Figure 1030 The desirable feature of this ampli er con guration is that, as we shall soon verify, it provides a high input impedance and a

10

Transistor Ampli ers and Switches

R1 R C G

low output impedance These features are both very useful and compensate for the fact that the voltage gain of the device is at most unity As usual, the Q point of the ampli er is found by writing KVL around the drain circuit: VDSQ = VDD IDQ RS (1048)

+ ~ _

v(t)

S RS

+ vout

and by assuming that no current ows into the gate The voltage VGSQ , which controls the gate-to-source bias, is then given by the expression VGSQ = VGG IDQ RS (1049)

Source follower ID + RG + VGSQ VDSQ RS VDD

so that the desired Q point may be established by selecting appropriate values of R1 , R2 , and RS (Example 1010 will illustrate a typical design) The AC equivalent circuit is shown in Figure 1031 Since it is possible to select R1 and R2 arbitrarily, we see that the input resistance, RG , of the source follower can be made quite large Another observation is that, for this type of ampli er, the voltage gain is always less than 1 This fact may be veri ed by considering that VGS = vin (t) gm VGS RS which implies (1050)

RG = R1 R2 VGG = R2 V R1 + R2 DD DC circuit

VGS 1 = vin (t) 1 + g m RS Since the AC output voltage is related to vout = gm VGS RS it follows that vout = gm RS VGS Thus, the open-circuit voltage gain, , may be obtained as follows: vout vout 1 = = (gm RS ) vin VGS 1 + g m RS = gm RS <1 gm R S + 1 VGS by

(1051)