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With both v1 and v2 at zero volts, M3 and M4 will be turned off (in cutoff), since vGS is less than VT (0 V < 17 V) M1 and M2 will be turned on, since the gate-to-source voltages will be greater than VT
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and will be on See Figure 1058 To determine the output voltage, we assume that Q3 is operating in saturation Then, applying KVL to the collector circuit we have: VCC = IC3 R3 + VCE3 or IC3 = and vout = VCC IC R3 = 5 22 10 3 22 10 3 = 5 484 = 016 V These results are summarized in the table below The output values are consistent with TTL logic; the output voltage for case (4) is suf ciently close to zero to be considered zero for logic purposes VCC VCE3 VCC VCE sat 5 02 = 22 mA = = RC RC 2,200
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v1 0V 0V 5V 5V
v2 0V 5V 0V 5V
State of Q2 Off Off Off On
State of Q3 Off Off Off On
vout 5V 5V 5V 016 V
Comments: While exact analysis of TTL logic gate circuits could be tedious and
involved, the method demonstrated in this example to determine whether transistors are on or off leads to very simple analysis Since in logic devices one is interested primarily in logic levels and not in exact values, this approximate analysis method is very appropriate
Focus on Computer-Aided Solutions: An Electronics WorkbenchTM simulation of the TTL NAND gate may be found in the accompanying CD-ROM You may wish to validate the saturation assumption for transistors Q2 and Q3 by measuring VCE2 and VCE3 in the simulation
Check Your Understanding
1011 Show that both v1 and v2 must be high for the AND gate circuit shown in Figure 1059 to give a logic high output 1012 Show that the circuit in Figure 1060 acts as an AND gate, and construct a truth table as in Example 1011 1013 What value of RD would ensure a drain-to-source voltage, vDS , of 5 V in the circuit of Example 1012 1014 Analyze the CMOS gate of Figure 1061 and nd the output voltages for the following conditions: (a) v1 = 0, v2 = 0; (b) v1 = 5 V, v2 = 0; (c) v1 = 0, v2 = 5 V; (d) v1 = 5 V, v2 = 5 V Identify the logic function accomplished by the circuit
10
Transistor Ampli ers and Switches
RL 57 k v1 v2 D1 D2 + vout v1 v2 2 k 24 k 27 k vout vout
v1 VT = 15 V
Figure 1059 Diode AND gate
18 k v2
(AND gate)
Figure 1060 TTL AND gate
Figure 1061 CMOS NAND gate
CONCLUSION
Small-signal models of transistors permit linear circuit analysis of ampli er circuits, using the well-established techniques of s 3 and 4 Small-signal, or h-parameter, BJT models take into account the base and collector i-v characteristics in terms of linearized resistance parameters and controlled sources These models can be used to analyze the operation of the BJT as a linear ampli er Various ampli er con gurations exist, each of which can be characterized by an equivalent input and output resistance and by an open-circuit voltage gain Field-effect transistors can also be modeled by means of small-signal parameters and controlled sources Small-signal FET ampli ers can be designed on the basis of linear circuit models in a manner similar to BJT ampli ers BJTs are characterized by a more linear transfer characteristic than FETs and provide, in general, greater current output However, the input impedance of FETs is signi cantly larger In general, the favorable features of each family of transistors can be exploited when multistage ampli ers are designed All transistor ampli ers are limited in their frequency response by the presence of coupling capacitors and by internal transistor parasitic capacitances Transistors form the basis of many switching circuits Transistor switching circuits can employ either BJT or FET circuits, giving rise to two very large families of digital logic circuits: TTL and CMOS Each family is characterized by certain advantages; in particular, TTL circuits are faster and can provide greater load currents, while CMOS circuits are characterized by extremely low power consumption and are more easily fabricated Transistor switching circuits can be analyzed more easily than linear ampli er circuits, since one is usually concerned only with whether the device is on or off
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