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i2 IB + IB+ + vout
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The latter parameter is sometimes more convenient from the standpoint of analysis The following example illustrates the effect of the nonzero input bias current on a practical ampli er design
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EXAMPLE 1214 Effect of Input Offset Current on an Ampli er
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Problem
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R2 R1 IB + IB+ R1 || R2 = R3
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Determine the effect of the input offset current Ios on the output of the ampli er of Figure 1250
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Solution
Known Quantities: Resistor values; input offset current Find: The offset voltage component in the output voltage, vout,os Schematics, Diagrams, Circuits, and Given Data: Ios = 1 A; R2 = 10 k
Assumptions: Assume input-offset-current-limited (otherwise ideal) op-amp Analysis: We calculate the inverting and noninverting terminal voltages caused by the
offset current in the absence of an external input: v + = R 3 IB + v = v + = R 3 IB +
With these values we can apply KCL at the inverting node and write: v+ vout v = IB R1 R2 R3 IB + R3 IB + vout = IB R2 R2 R1 vout = R2 IB + R3 1 1 + R2 R1 + IB = R2 Ios
Thus, we should expect the output of the ampli er to be shifted downward by R2 Ios , or 104 10 6 = 10 mV for the data given in this example
Comments: Usually, the worst-case input offset current (or input bias currents) are listed in the device data sheets (see the data sheets in the accompanying CD-ROM, or in the device templates in the Electronics WorkbenchTM libraries, for an illustration) Values can range from 100 pA (for CMOS op-amps, eg, LMC6061) to around 200 nA for a low-cost general-purpose ampli er (eg, A 741c)
Output Offset Adjustment Both the offset voltage and the input offset current contribute to an output offset voltage Vout,os Some op-amps provide a means for minimizing Vout,os For example, the A741 op-amp provides a connection for this procedure Figure 1251 shows a typical pin con guration for an op-amp in an eight-pin dual-in-line package (DIP) and the circuit used for nulling the output offset voltage The variable
Part II
Electronics
resistor is adjusted until vout reaches a minimum (ideally, 0 volts) Nulling the output voltage in this manner removes the effect of both input offset voltage and current on the output Slew Rate Limit Another important restriction in the performance of a practical op-amp is associated with rapid changes in voltage The op-amp can produce only a nite rate of change at its output This limit rate is called the slew rate Consider an ideal step input, where at t = 0 the input voltage is switched from zero to V volts Then we would expect the output to switch from 0 to A V volts, where A is the ampli er gain However, vout (t) can change at only a nite rate; thus, dvout (t) dt = S0 = Slew rate
Offset null _ + VS
RF RS
(1285)
_ + Offset null + vout
Figure 1252 shows the response of an op-amp to an ideal step change in input voltage Here, S0 , the slope of vout (t), represents the slew rate The slew rate limitation can affect sinusoidal signals, as well as signals that display abrupt changes, as does the step voltage of Figure 1252 This may not be obvious until we examine the sinusoidal response more closely It should be apparent that the maximum rate of change for a sinusoid occurs at the zero crossing, as shown by Figure 1253 To evaluate the slope of the waveform at the zero crossing, let v(t) = A sin t so that dv(t) = A cos t dt (1287) (1286)
+15 V 10 k Variable resistor
15 V
Figure 1251 Output off-set voltage adjustment
V Av v t=0 S0
vout (t) vin (t)
The maximum slope of the sinusoidal signal will therefore occur at t = 0, , 2 , , so that dv(t) dt = A = S0
(1288)
Figure 1252 Slew rate limit in op-amps
Thus, the maximum slope of a sinusoid is proportional to both the signal frequency and the amplitude The curve shown by a dashed line in Figure 1253 should indicate that as increases, so does the slope of v(t) at the zero crossings What is the direct consequence of this result, then Example 1215 gives an illustration of the effects of this slew rate limit
Maximum slope v(t)
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