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copy each bit until the rst 1 has been copied, and then replace each successive 1 by a 0 and each 0 by a 1 You may wish to try this rule on the two previous examples to verify that it is much easier to use than the subtraction from 2n Different conventions exist in the binary system to represent whether a number is negative or positive One convention, called the sign-magnitude convention, makes use of a sign bit, usually positioned at the beginning of the number, for which a value of 1 represents a minus sign and a value of 0, a plus sign Thus, an eight-bit binary number would consist of a sign bit followed by seven magnitude bits, as shown in Figure 138(a) In a digital system that uses eight-bit signed integer words, we could represent integer numbers (decimal) in the range (27 1) N +(27 1) or 127 N +127
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Actual magnitude of binary number (if b 7 = 0) One s complement of binary number (if b 7 = 1) (b) Sign bit b7 b6 b5 b4 b3 b2 b1 b0 Actual magnitude of binary number (if b 7 = 0) Two s complement of binary number (if b 7 = 1) (c)
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Figure 138 (a) Eight-bit sign-magnitude binary number; (b) Eight-bit one s complement binary number; (c) Eight-bit two s complement binary number
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A second convention uses the one s complement notation In this convention, a sign bit is also used to indicate whether the number is positive (sign bit = 0) or negative (sign bit = 1) However, the magnitude of the binary number is represented by the true magnitude if the number is positive, and by its one s complement if the number is negative Figure 138(b) illustrates the convention For example, the number (91)10 would be represented by the seven-bit binary number (1011011)2 with a leading 0 (the sign bit): (01011011)2 On the other hand, the number ( 91)10 would be represented by the seven-bit one s complement binary number (0100100)2 with a leading 1 (the sign bit): (10100100)2 Most digital computers use the two s complement convention in performing integer arithmetic operations The two s complement convention represents positive numbers by a sign bit of 0, followed by the true binary magnitude; negative numbers are represented by a sign bit of 1, followed by the two s complement of the binary number, as shown in Figure 138(c) The advantage of the two s complement convention is that the algebraic sum of two s complement binary numbers is carried out very simply by adding the two numbers including the sign bit Example 131 illustrates two s complement addition
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13
Digital Logic Circuits
EXAMPLE 131 Two s Complement Operations
Problem
Perform the following subtractions using two s complement arithmetic: 1 X Y = 1011100 1110010 2 X Y = 10101111 01110011
Solution
Analysis: The two s complement subtractions are performed by replacing the operation X Y with the operation X + ( Y ) Thus, we rst nd the two s complement of Y and add the result to X in each of the two cases:
X Y = 1011100 1110010 = 1011100 + (27 1110010) = 1011100 + 0001110 = 1101010 Next, we add the sign bit (in boldface type) in front of each number (1 in rst case since the difference X Y is a negative number): X Y = 11101010 Repeating for the second subtraction gives: X Y = 10101111 01110011 = 10101111 + (28 01110011) = 10101111 +10001101 = 00111100 = 000111100 where the rst digit is a 0 because X Y is a positive number
The Hexadecimal System
Table 136 Hexadecimal code 0 1 2 3 4 5 6 7 8 9 A B C D E F 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111
It should be apparent by now that representing numbers in base 2 and base 10 systems is purely a matter of convenience, given a speci c application Another base frequently used is the hexadecimal system, a direct derivation of the binary number system In the hexadecimal (or hex) code, the bits in a binary number are subdivided into groups of four Since there are 16 possible combinations for a fourbit number, the natural digits in the decimal system (0 through 9) are insuf cient to represent a hex digit To solve this problem, the rst six letters of the alphabet are used, as shown in Table 136 Thus, in hex code, an eight-bit word corresponds to just two digits; for example: 1010 01112 = A716 0010 10012 = 2916 Binary Codes In this subsection, we describe two common binary codes that are often used for practical reasons The rst is a method of representing decimal numbers in digital logic circuits that is referred to as binary-coded decimal, or BCD, representation In effect, the simplest BCD representation is just a sequence of four-bit binary numbers that stops after the rst 10 entries, as shown in Table 137 There are
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