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term Z = (A B) using a two-input NAND gate, and the term Z + C using a two-input NOR gate The solution is shown in Figure 1326
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The XOR (Exclusive OR) Gate It is rather common practice for a manufacturer of integrated circuits to provide common combinations of logic circuits in a single integrated circuit package We review many of these common logic modules in Section 135 An example of this idea is provided by the exclusive OR (XOR) gate, which provides a logic function similar, but not identical, to the OR gate we have already studied The XOR gate acts as an OR gate, except when its inputs are all logic 1s; in this case, the output is a logic 0 (thus the term exclusive) Figure 1327 shows the logic circuit symbol adopted for this gate, and the corresponding truth table The logic function implemented by the XOR gate is the following: either X or Y , but not both This description can be extended to an arbitrary number of inputs The symbol adopted for the exclusive OR operation is , and so we shall write Z =X Y to denote this logic operation The XOR gate can be obtained by a combination of the basic gates we are already familiar with For example, if we observe that the XOR function corresponds to Z = X Y = (X + Y ) (X Y ), we can realize the XOR gate by means of the circuit shown in Figure 1328 Common IC logic gate con gurations, device numbers, and data sheets are included in the CD-ROM that accompanies this book These devices are typically available in both of the two more common device families, TTL and CMOS The devices listed in the CD-ROM are available in CMOS technology under the numbers SN74AHXX The same logic gate ICs are also available as TTL devices
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Figure 1327 XOR gate
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Figure 1328 Realization of an XOR gate
13
Digital Logic Circuits
Check Your Understanding
139 Show that one can obtain an OR gate using NAND gates only [Hint: Use three
NAND gates]
1310 Show that one can obtain an AND gate using NOR gates only [Hint: Use three
NOR gates]
1311 Prepare a step-by-step truth table for the following logic expressions:
a (X + Y + Z) + (X Y Z) X b X Y Z + Y (Z + W ) c (X Y + Z W ) (W X + Z Y ) [Hint: Your truth table must have 2n entries, where n is the number of logic variables]
1312 Implement the logic functions of Check Your Understanding Exercise 1311 using NAND and NOR gates only [Hint: Use De Morgan s theorems and the fact that f = f ] 1313 Implement the logic functions of Check Your Understanding Exercise 1311 using AND, OR, and NOT gates only 1314 Show that the XOR function can also be expressed as Z = X Y +Y X Realize the corresponding function using NOT, AND, and OR gates [Hint: Use truth tables for the logic function Z ( as de ned in the exercise) and for the XOR function]
KARNAUGH MAPS AND LOGIC DESIGN
In examining the design of logic functions by means of logic gates, we have discovered that more than one solution is usually available for the implementation of a given logic expression It should also be clear by now that some combinations of gates can implement a given function more ef ciently than others How can we be assured of having chosen the most ef cient realization Fortunately, there is a procedure that utilizes a map describing all possible combinations of the variables present in the logic function of interest This map is called a Karnaugh map, after its inventor Figure 1329 depicts the appearance of Karnaugh maps for two-, three-, and four-variable expressions in two different forms As can be seen, the row and column assignments for two or more variables are arranged so that all adjacent terms change by only one bit For example, in the two-variable map, the columns next to column 01 are columns 00 and 11 Also note that each map consists of 2N cells, where N is the number of logic variables Each cell in a Karnaugh map contains a minterm, that is, a product of the N variables that appear in our logic expression (in either uncomplemented or complemented form) For example, for the case of three variables (N = 3), there are 23 = 8 such combinations, or minterms: X Y Z, X Y Z, X Y Z, X Y Z, X Y Z, X Y Z, X Y Z, and X Y Z The content of each cell that is, the minterm is the product of the variables appearing at the corresponding vertical and horizontal coordinates For example, in the three-variable map, X Y Z appears at the intersection of X Y and Z The map is lled by placing a value of 1 for any combination of variables for which the desired output is a 1 For example, consider the function of three variables for which we desire to have an output of 1 whenever the variables X, Y , and Z have the following values:
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