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Figure 1346 Figure 1347
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Sum-of-products expression Sum-of-products expressions use ones to determine the logical expression from a Karnaugh map Figure 1347 depicts the Karnaugh map covering with ones, leading to the expression f = (x y) + (x y) + (y z)
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Comments: The product-of-sums solution requires the use of ve gates (two OR, two
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NOT, and one AND), while the sum-of-products solution will use six gates (one OR, two NOT, and three AND) Thus, solution 1 leads to the simpler design
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EXAMPLE 1315 Product-of-Sums Design
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Realize the function f described by the accompanying truth table in minimal product of sums form
Part II
Electronics
Solution
Known Quantities: Truth table for logic function Find: Realization in minimal product-of-sums forms Analysis: We cover the Karnaugh map of Figure 1348 using zeros, and obtain the
x 0 0 0 0 1 1 1 1
x yz 00 0 1 1 1 01 0 0 11 0 0 10 1 0
y 0 0 1 1 0 0 1 1
z 0 1 0 1 0 1 0 1
f 1 0 1 0 1 0 0 0
following function: f = z (x + y)
Comments: Is the sum-of-products solution simpler Try it for yourself
Safety Circuit for Operation of a Stamping Press
In this example, the techniques illustrated in the preceding examples will be applied to a practical situation To operate a stamping press, an operator must press two buttons (b1 and b2 ) one meter apart from each other and away from the press (this ensures that the operator s hands cannot be caught in the press) When the buttons are pressed, the logical variables b1 and b2 are equal to 1 Thus, we can de ne a new variable A = b1 b2 ; when A = 1, the operator s hands are safely away from the press In addition to the safety requirement, however, other conditions must be satis ed before the operator can activate the press The press is designed to operate on one of two workpieces, part I and part II, but not both Thus, acceptable logic states for the press to be operated are part I is in the press, but not part II and part II is in the press, but not part I If we denote the presence of part I in the press by the logical variable B = 1 and the presence of part II by the logical variable C = 1, we can then impose additional requirements on the operation of the press For example, a robot used to place either part in the press could activate a pair of switches (corresponding to logical variables B and C) indicating which part, if any, is in the press Finally, in order for the press to be operable, it must be ready, meaning that it has to have completed any previous stamping operation Let the logical variable D = 1
FOCUS ON MEASUREMENTS
13
Digital Logic Circuits
represent the ready condition We have now represented the operation of the press in terms of four logical variables, summarized in the truth table of Table 1312 Note that only two combinations of the logical variables will result in operation of the press: ABCD = 1011 and ABCD = 1101 You should verify that these two conditions correspond to the desired operation of the press Using a Karnaugh map, realize the logic circuitry required to implement the truth table shown
Table 1312 Conditions for operation of stamping press (B) Part I is in press 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 (C) Part II is in press 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 (D) Press is operable 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Press operation 1 = pressing; 0 = not pressing 0 0 0 0 0 0 0 0 0 0 0 1 0 1 0 0
(A) b1 b 2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1
Both buttons (b1 , b2 ) must be pressed for this to be a 1
Solution:
Table 1312 can be converted to a Karnaugh map, as shown in Figure 1349 Since there are many more 0s than 1s in the table, the use of 0s in covering the map will lead to greater simpli cation This will result in a product-of-sums expression The four subcubes shown in Figure 1349 yield the equation A D (C + B) (C + B) By De Morgan s law, this equation is equivalent to A D (C + B) (C B) which can be realized by the circuit of Figure 1350 For the purpose of comparison, the corresponding sum-ofproducts circuit is shown in Figure 1351 Note that this circuit employs a greater number of gates and will therefore lead to a Multisim more expensive design Focus on Computer-Aided Solutions An Electronics WorkbenchTM simulation of the logic circuit of Figure 1350 may be found in the accompanying CD-ROM
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