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Sample Sample input vSH va FET switch + C Voltage follower (buffer) va vSH va vSH Sample input
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Sample-and-hold amplifier
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Functional representation of FET bilateral switch
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Figure 1530 Description of the sample-and-hold process
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effect becomes nearly a short circuit for the duration of the sampling pulse While the MOSFET conducts, the analog voltage, va , charges the hold capacitor, C, at a fast rate through the small on resistance of the MOSFET The duration of the sampling pulse is suf cient to charge C to the voltage va Because the MOSFET is virtually a short circuit for the duration of the sampling pulse, the charging (RC) time constant is very small, and the capacitor charges very quickly When the sampling pulse is over, the MOSFET returns to its nonconducting state, and the capacitor holds the sampled voltage without discharging, thanks to the extremely high input impedance of the voltage-follower (buffer) stage Thus, vSH is the sampled-and-held value of va at any given sampling time
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EXAMPLE 1510 Sample-and-Hold Ampli er
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Using the data sheets for the AD585 sample-and-hold ampli er (supplied in the enclosed CD-ROM), answer the following questions: 1 2 What is the acquisition time of the AD582 How could acquisition time be reduced
Solution
Known Quantities: AD585 device data sheets Find: Acquisition time Schematics, Diagrams, Circuits, and Given Data: DAC speci cations found in device data sheet De nition: the acquisition time T is the time required for the output of the sample-and-hold ampli er to reach its nal value, within a speci ed error bound, after the ampli er has switched from the sample mode to the hold mode The time T includes the switch delay time, the slewing interval, and the ampli er settling time Analysis:
1 2
From the data sheets, the acquisition time for the AD585 is 3 s This acquisition time could be reduced by reducing the value of the holding capacitor, CH
15
Electronic Instrumentation and Measurements
Comments: The signi cance of the sampling frequency is discussed in the next subsection in connection with the Nyquist sampling criterion
v(t)
va(t)
vSH (t)
t0 t1 t2 t3 t4
tn 1 tn
Figure 1531 Sampled data
The appearance of the output of a typical sample-and-hold circuit is shown in Figure 1531, together with the analog signal to be sampled The time interval between samples, or sampling interval, tn tn 1 , allows the ADC to perform the conversion and make the digital version of the sampled signal available, say, to a computer or to another data acquisition and storage system The sampling interval needs to be at least as long as the A/D conversion time, of course, but it is reasonable to ask how frequently one needs to sample a signal to preserve its fundamental properties, that is, the basic shape of the waveform One might instinctively be tempted to respond that it is best to sample as frequently as possible, within the limitations of the ADC, so as to capture all the features of the analog signal In fact, this is not necessarily the best strategy How should we select the appropriate sampling frequency for a given application Fortunately, an entire body of knowledge exists with regard to sampling theory, which enables the practicing engineer to select the best sampling rate for any given application Given the scope of this chapter, we have chosen not to delve into the details of sampling theory, but, rather, to provide the student with a statement of the fundamental result: the Nyquist sampling criterion
The Nyquist criterion states that to prevent aliasing3 when sampling a signal, the sample rate should be selected to be at least twice the highest-frequency component present in the signal
Thus, if we were sampling an audio signal (say, music), we would have to sample at a frequency of at least 40 kHz (twice the highest audible frequency, 20 kHz) In practice, it is advisable to select sampling frequencies substantially greater than the Nyquist rate; a good rule of thumb is 5 to 10 times greater The following example illustrates how the designer might take the Nyquist criterion into account in designing a practical A/D conversion circuit
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