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For the remainder of this chapter, we shall focus on developing techniques for computing equivalent representations of linear networks Such representations will be useful in deriving some simple yet general results for linear circuits, as well as analyzing simple nonlinear circuits Thevenin and Norton Equivalent Circuits This section discusses one of the most important topics in the analysis of electrical circuits: the concept of an equivalent circuit It will be shown that it is always possible to view even a very complicated circuit in terms of much simpler equivalent source and load circuits, and that the transformations leading to equivalent circuits are easily managed, with a little practice In studying node voltage and mesh current analysis, you may have observed that there is a certain correspondence (called duality) between current sources and voltage sources, on the one hand, and parallel and series circuits, on the other This duality appears again very clearly in the analysis of equivalent circuits: it will shortly be shown that equivalent circuits fall into one of two classes, involving either voltage or current sources and (respectively) either series or parallel resistors, re ecting this same principle of duality The discussion of equivalent circuits begins with the statement of two very important theorems, summarized in Figures 331 and 332
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i Source + v Load vT + _ RT + v i Load
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Figure 331 Illustration of Th venin theorem e
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i Source + v Load iN RN + v
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i Load
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Figure 332 Illustration of Norton theorem
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Circuits
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The Th venin Theorem e As far as a load is concerned, any network composed of ideal voltage and current sources, and of linear resistors, may be represented by an equivalent circuit consisting of an ideal voltage source, vT , in series with an equivalent resistance, RT
The Norton Theorem As far as a load is concerned, any network composed of ideal voltage and current sources, and of linear resistors, may be represented by an equivalent circuit consisting of an ideal current source, iN , in parallel with an equivalent resistance, RN
The rst obvious question to arise is, how are these equivalent source voltages, currents, and resistances computed The next few sections illustrate the computation of these equivalent circuit parameters, mostly through examples A substantial number of Check Your Understanding exercises are also provided, with the following caution: The only way to master the computation of Th venin and Norton e equivalent circuits is by patient repetition Determination of Norton or Thevenin Equivalent Resistance The rst step in computing a Th venin or Norton equivalent circuit consists of e nding the equivalent resistance presented by the circuit at its terminals This is done by setting all sources in the circuit equal to zero and computing the effective resistance between terminals The voltage and current sources present in the circuit are set to zero by the same technique used with the principle of superposition: voltage sources are replaced by short circuits, current sources by open circuits To illustrate the procedure, consider the simple circuit of Figure 333; the objective is to compute the equivalent resistance the load RL sees at port a-b In order to compute the equivalent resistance, we remove the load resistance from the circuit and replace the voltage source, vS , by a short circuit At this point seen from the load terminals the circuit appears as shown in Figure 334 You can see that R1 and R2 are in parallel, since they are connected between the same two nodes If the total resistance between terminals a and b is denoted by RT , its value can be determined as follows: RT = R3 + R1 R2 (328)
vS + _
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An alternative way of viewing RT is depicted in Figure 335, where a hypothetical 1-A current source has been connected to the terminals a and b The voltage vx appearing across the a-b pair will then be numerically equal to RT (only because iS = 1 A!) With the 1-A source current owing in the circuit, it should be apparent that the source current encounters R3 as a resistor in series with the parallel combination of R1 and R2 , prior to completing the loop
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