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ELECTRONIC PACKAGING AND HIGH-DENSITY INTERCONNECTIVITY*
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2.1 INTRODUCTION
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All electronic components must be interconnected and assembled to form a functional and operating system. The design and the manufacture of these interconnections have evolved into a separate discipline called electronic packaging. Since the early 1950s, the basic building block of electronic packaging is the printed wiring board (PWB), and it will remain that into the foreseeable future. This book outlines the basic design approaches and manufacturing processes needed to produce these PWBs. This chapter outlines the basic considerations, the main choices, and the potential tradeoffs that must be accounted for in the selection of the interconnection methods for electronic systems. Its main emphasis is on the analysis of potential effects that the selection of various printed wiring board types and design alternatives could have on the cost and performance of the complete electronic product.
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2.2 MEASURING THE INTERCONNECTIVITY REVOLUTION (HDI)
The continuing increase in component performance and lead density, along with the reduction in package sizes, has required that PWB technology find corresponding ways to increase the interconnection density of the substrate. With the introduction and continued refinement of such packaging techniques as the ball grid array (BGA), chip-scale packaging (CSP), and chip-on-board (COB), traditional PWB technology has approached a point where alternative ways of providing high-density interconnection have had to be developed. (See Chaps. 3 and
* Adapted from Coombs, Clyde F. Jr., Printed Circuits Handbook (4th ed.), chap. 1, Electronic Packaging and Interconnectivity, (McGraw-Hill, New York, 1996.)
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PRINTED CIRCUITS HANDBOOK
4 for detailed discussions of component and packaging technologies.) This has been called at times high-density interconnects (HDI), the interconnection revolution, or the density revolution, because doing the same things in the same way, only smaller, was no longer sufficient.
Interconnect Density Elements The extent of these interconnect density issues is not always observable, but the chart1 in Fig. 2.1 can help one define and understand it. The chart portrays the interrelationship between component packaging, surface-mount technology (SMT) assembly, and PWB density. As can be seen, these three elements are interlinked. A change in one has a significant effect on the overall interconnection density. The metrics are as follows:
Assembly (parts & leads per sq. inch)
Components (ave. leads per part)
PWB (inches per sq. inch)
FIGURE 2.1 Representation of the metrics of assembly, component, and PWB technologies and their general relationship to each other.
Assembly complexity: the measure of the difficulty of assembling surface-mounted components in parts per square inch and leads per square inch. Component packaging complexity: the degree of sophistication of a component, measured by its average leads (I/Os) per part. Printed wiring board density: the amount of wiring a PWB has as measured by the average length of traces per square inch or the area of that board, including all signal layers. The metric is inches per square inch.
Interconnect Technology Map To visualize the interrelationships of the three elements, see Fig. 2.2. It shows these elements as axes of a three-dimensional technology map that defines the passage from conventional PWB structures to advanced technologies and shows how changes in just one of the elements can increase or decrease the total density of the entire electronic package.
ELECTRONIC PACKAGING AND HIGH-DENSITY INTERCONNECTIVITY
Component Density (parts/sq. inch)
Assembly (parts & leads per sq. inch) Components (ave. leads per part)
PWB (inches per sq. inch)
Region of "Conventional PWB"
Assembly
Pr in te d
W iri ng
Region of "Advanced Technologies"
z. x. Components
1 1 10 Component Complexity (ave leads/part)
FIGURE 2.2 Component technology map, showing the relationship of assembly, PWB, and component technologies on overall package density and technology.
To describe the component complexity of an assembly, the total component connections (I/Os) include both sides of an assembly, as well as edge fingers, or contacts, which are divided by the total number of components on the assembly. The resulting average leads (I/Os) per part provides the x-axis of Fig. 2.2. The horizontal oval shape shows how the component complexity can vary from two leads per part in discrete circuit elements to the very large numbers seen on BGA and application-specific integrated circuits. When Fig. 2.2 is used to describe surface-mount assemblies, the vertical (y-axis) dimension (shown as a vertical oval) indicates how complex it is to assemble the board by number of components per square inch or square centimeter for the surface area of the PWB. This vertical oval can vary from 1 to over 100 parts per square inch. As the parts become smaller and closer together, this number naturally goes up. A second assembly measure is average leads (I/Os) per square inch or square centimeter. This is the x-axis value multiplied by the y-axis value. (For a further description of these issues, and equations for quantifying them, see Chap. 18.) The z-axis oval in Fig. 2.2 describes the printed wiring board s density. This is the wiring required to connect all the I/Os of the components at the size of the assembly specified, assuming three nodes per net.This axis has the units inches per square inch, or centimeters per square centimeter. A further description of this metric is provided in this chapter and in more detail in Chap. 19. 2.2.3 An Example of the Interconnect Revolution By charting products of a particular type over time, an analysis will show how the interconnect technology has changed and continues to change, its rate of change, and the direction of these changes. An example is given in Fig. 2.3. This shows how component technology, assembly technology, and PWB technology have led to the evolution of the same computer CPU from:
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