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FIGURE 19.13
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surface mounting technology and is usually referred to as EIC density. An EIC is the total number of leads of the components divided by 14 or 16, the old number of pins on a dualinline package (DIP). Many people also use 20 as a divisor. Equation 19.10 defines EIC density mathematically in EIC/sq. in. EIC Density = Connections/16/Board Area where Connections = total component leads Board Area = top surface board area (in sq. cm. or sq. in.) (19.10)
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Design Density Index, DDI
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DDI = 13.6 x [EIC/sq. in.)^1.53]
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Design rules and layer count for various DDIs.
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Typical Example of Wiring Demand Calculation As an example, take a typical consumer electronic board with these characteristics:
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Design: consumer PCB, all through hole components Components: 86
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PLANNING FOR DESIGN, FABRICATION, AND ASSEMBLY
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Leads: 1,540 Size: 19.6 in. 19.5 in. = 57 sq. in. EIC/sq. in. = 110/57 sq. in. = 1.93 (using Eq. 19.10) DDI = 13.6 ( 1.93 ) 1.53 = 319.7 ~ Figure19.13 advises two tracks on two signal layers (using Eq. 19.9).
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PWB FABRICATION TRADE-OFF PLANNING
The metrics for PWB and chip-on-board (COB) fabrication involve with trade-offs between the performance objectives and the PWB price. Calculating prices requires the PCB characteristics and manufacturing yield. Manufacturing yield requires producibility estimates. Three items are required to predict PCB prices:
Fabrication complexity matrix Prediction of producibility and first-pass yield Relative price as a function of a price index
Fabrication Complexity Matrix The fabrication complexity matrix is supplied by a PWB fabricator. It relates the various design choices on a PWB to design points. These points are based on the actual prices that a fabricator will charge for these features. They are calculated by dividing the actual costs and the values by the smallest nonzero amount. Typical factors that fabricators can use to price a printed wiring board include the following:
Size of the board and number that fit on a panel Number of layers Material of construction Trace and space widths Total number of holes Smallest hole diameter Solder mask and component legends Final metalization or finish Gold-plated edge connectors Factors specific to the design
A typical fabrication complexity matrix would look like Table 19.3. This is not a complete matrix, but does show the design factors and the design points assigned to each. 19.5.2 Predicting Producibility The simple truth about printed circuit boards, multichip modules, and hybrid circuits is that the design factors such as those listed previously can have a cumulative effect on manufacturing yield. These factors all affect producibility. Specifications can be selected that individually may not adversely affect yields but cumulatively can significantly reduce yields. A simple
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TABLE 19.3 Example of Fabrication Complexity Matrix Factors No. of layers Trace width (mils) No. of holes Pts. 12 8 10 Highest 8 4 5000 8000 Pts. 8 5 5 High middle 6 5 6 3000 5000 Pts. 4 3 3 Low middle 4 7 8 10000 3000 Pts. 1 1 1 Lowest 2 10 >10000
algorithm is available that collects these factors into a single metric, in this case called the complexity index (CI). It is given in Eq. 19.11. Complexity Index = where (Area) (Holes/unit area)^2 (no. Layers)^3 ^ (Min. trace width) (Min.annular ring) (Min. hole dia.) (19.11)
Area = top area of the substrate to be designed Holes = total number of drilled holes, blind, buried, and through Holes/unit area = holes divided by board Area Trace width = the minimum trace width on the substrate Layers = the total number of layers in the substrate Annular ring = 1/2 the difference between the via land and the hole dia. Hole dia. = finished hole size Area, number of holes, minimum trace width, number of layers, and minimum tolerance (absolute number) are the factors of the board being designed
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