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The cleaning step can be performed in either a batch or inline machine. The optimum equipment is determined by production volumes, floor space, and capital expenditure costs. Smaller, batch cleaning (or dishwasher ) machines are very cost-effective for overall batchtype processes (e.g., hand soldering) as well as for circuit boards assembled in low production volumes. Inline cleaning equipment is placed at the end of the soldering assembly line to accommodate high production volumes. Whether batch or inline equipment is used, an equally important consideration is selecting the type of cleaning solution. Solvent-based, aqueous, and semi-aqueous cleaning materials are commercially available that meet environmental regulations and provide adequate efficacy for the removal of flux residues. The impact of Pb-free soldering on the cleaning step depends on the particular assembly process. By virtue that the same pot temperatures are used in Pb-free wave soldering as are specified for Sn-Pb solder, there is no added thermal degradation to the flux residues that would cause them to be more difficult to remove from the circuit board surfaces. Such degradation may be observed, albeit to a limited extent, with hand assembly due to slightly longer soldering times. Thermal effects are potentially most significant with paste-in-hole soldering because of the increased temperature settings of the reflow furnace required to melt Pb-free alloys.
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Surface-mount technology refers to assemblies that have components soldered to pads on the surfaces of the circuit board. Components may populate only one side (single-sided) or both sides (double-sided) of the circuit board. Surface-mount technology dates back to the 1960s, when it was developed for hybrid microcircuit (HMC) assemblies for which it was difficult to put holes into the ceramic substrates. The advent of surface-mount technology for laminate substrates, though, is relatively recent (c. 1980). The advantages of surface-mount technology include smaller components and greater board densities. The large holes have been replaced by small vias for signal conduction between sides and internal layers. Finer traces and reduced component heights also contribute to increased circuit board miniaturization and functionality. Surface-mount circuit boards are shown in Fig. 40.10.
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FIGURE 40.10 Surface-mount technology circuit boards showing the range of passive and active device sizes and geometries. (Courtesy of Sandia National Laboratories and American Competitiveness Institute.)
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The trend in surface-mount technology is to use smaller passive devices such as capacitors, resistors, and inductors. Also, there is the use of embedded passive devices, that is, resistors and capacitors that are located within the circuit board laminate. Embedded passive devices free up additional surface area for larger, active components.
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Active devices are experiencing two opposing trends. On the one hand, memory components (RAM, SDRAM, etc.) are becoming smaller as more transistors are being packed on to the silicon chip. On the other hand, microprocessors and application-specific integrated circuits (ASICs) are becoming larger because of increased functionality on larger chips. Both trends have seen a shift away from peripherally leaded packages to area-array packages. Area-array packages include BGAs and the smaller counterparts, those being CSPs and DCA/FC technology. Examples of peripherally leaded and area-array packages are shown in Fig. 40.11. The advantages of the area-array technology include a reduction of the component footprint by eliminating the leads that extend from the package. Also, fewer assembly defects results from damage to the fragile leads during packaging, transportation, and part placement on the circuit board.
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FIGURE 40.11 Photographs of (a) peripherally leaded and (b) area-array surface-mount packages. (Courtesy of Sandia National Laboratories.)
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At the inception of area-array technology, the size and pitch of the I/Os were initially higher when compared to what was then 0.4 mm and 0.5 mm fine-pitch, peripherally leaded packages. However, as I/O counts have increased with the functionality of area-array packages, solder ball size and pitch have decreased significantly, particularly when taking into account DCA technology. Increased device functionality and further miniaturization, which have resulted in higher board densities, are placing stricter requirements on circuit board technology. Increased internal conductor layer counts result in the need for thicker laminates. Whereas once the 1.58 mm board thickness was the norm, now 2.29 mm is commonplace, with many products requiring thicknesses greater than 2.54 mm. The internal conductor layers are being designed to carry not only the electrical signal, but also contribute to thermal management by removing excess heat from active devices. Similarly, the vias within the laminate are used to transmit signals between layers and the surfaces as well as remove excess heat from large active components (e.g., microprocessors, ASICs, etc.). Vias are reaching aspect ratios (length/diameter) of 8:1 to 10:1, which is nearing the fabrication as well as reliability limits for these structures. A particular advantage of surface-mount technology is the lower manufacturing cost resulting from automated assembly processes. Solder paste, which is the combination of solder metal powder, flux, and thixotropic agents, is applied in highly controlled amounts (thickness and area) using screen or stencil printing as well as dispensing techniques. Pick-and-place machines handle even the smallest components, locating them precisely on the solder paste deposits (or bricks ). The tacky nature of the flux component in the paste keeps the components in place. The assembled (or stuffed ) printed circuit board then passes through the convection/radiation reflow furnace or vapor phase (or condensation) reflow oven to melt the solder. The machines responsible for the steps paste printing, component placement, and reflow are
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