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Three-dimensional circuit technology was of great interest in the early to mid-1980s. The proponents for this technology, however, realized the mistake of trying to make it directly competitive with conventional flat circuits and have developed a niche where the substrate also offers other functional uses, such as structural support for the product. Manufacturers of three-dimensional circuits prefer to call them molded interconnection devices (MIDs). In many applications of MIDs, the number of components to interconnect the electronic and electrical components can be reduced, thus making the total assembly cost cheaper and the final structure more reliable.
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In 1953, the Motorola Corporation developed a PTH process called the Placir method,1 in which the entire surface and hole walls of an unclad panel are sensitized with SnCl2 and metallized by spraying on silver with a two-gun spray. Next, the panel is screened with a reverse conductor pattern, using a plating resist ink, leaving metallized conductor traces uncovered. The panel is then plated with copper by an electroplating method. Finally, the resist ink is stripped and the base silver removed to complete the PTH board. One problem associated with the use of silver is the migration caused by silver traces underneath the copper conductors. The Placir method was the forerunner of the semiadditive process, which is discussed in Chap. 31. In 1955, Fred Pearlstein2 published a process involving electroless nickel plating for metallizing nonconductive materials.This catalyzer consists of two steps. First, the panel is sensitized in SnCl2 solution, and then it is activated in PdCl2 solution. This process presented no problem for metallizing nonconductive materials. At the same time that Pearlstein s paper was published, copper-clad laminates were starting to become popular. Manufacturers of PWBs applied this two-step catalyzing process to making PTHs using copper-clad laminates. This process, however, turned out to be incompatible with the copper surface. A myriad of black palladium particles called smads were generated between copper foil and electrolessly deposited copper, resulting in poor adhesion between the electroless copper and the copper foil. These smads and electroless copper had to be brushed off with strong abrasive action before the secondary electroplating process could begin. To overcome this smad problem, around 1960 researchers began attempting to develop better catalysts; the products of their research were the predecessors of modern palladium catalysts.3 The mid-1950s was a busy time in the area of electroless copper-plating solutions. Electrolessly deposited nickel is difficult to etch. But since it adheres somewhat better to the base than does electroless copper, research for the development of stable electroless copperplating solutions was quite natural. Many patent applications for these solutions were filled in the mid-1950s. Among the applicants were P. B. Atkinson, Sam Wein, and a team of General Electric engineers, Luke, Cahill, and Agens. Atkinson won the case, and a patent4 teaching the use of Cu-EDTA as a complexing agent was issued in January 1964 (the application had been filed in September 1956).
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Subtractive and Additive Processes Photocircuits Corporation was another company engaged throughout the 1950s in the development of chemicals for PTH processes. Copper-clad laminates were expensive, and a major
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portion of expensive copper foil had to be etched (subtracted) to form the desired conductor pattern.The engineers at Photocircuits, therefore, concerned themselves with plating (adding) copper conductors wherever necessary on unclad materials for the sake of economy. Their efforts paid off. They were successful in developing not only the essential chemicals for reliable PTH processes but also the fully additive PWB manufacturing technology known as the CC-4* process. This process is discussed in detail in Chap. 31. With the use of SnCl2-PdCl2 catalysts and EDTA-base electroless copper-plating solutions, the modern PTH processes became firmly established in the 1960s. The process of metallizing hole walls with these chemicals for the subsequent formation of PTHs is commonly called the copper reduction process. In the subtractive method, which begins with copper-clad laminates, pattern plating and panel plating are the two most widely practiced methods of making PTH boards. These methods are discussed in the following subsections.
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Pattern Plating In the pattern-plating method, after the copper reduction process, plating resist layers of the reverse conductor image are formed on both sides of the panel by screening resist inks. In most fineline boards, photosensitive dry film is used instead. There are some minor variations in the pattern-plating method (see Fig. 5.6): 1. Catalyzing (preparing the nonconductive surface to cause copper to come out of solution onto that surface) 2. Thin electroless copper (0.00001 in) followed by primary copper electroplating; thick electroless copper (0.0001 in) 3. Imaging (application of a plating resist in the negative of the desired finished circuit) 4. Final electroplating copper 5. Solder plating (as etching resist) 0.0002 or 0.0006 in 6. Stripping plating resist 7. Etching of base copper 8. Solder etching (0.0002-in case); solder reflow (0.0006-in case) 9. Solder mask followed by hot-air solder coater leveler if solder etching is used 10. Final fabrication and inspection Most manufacturers of DSBs with relatively wide conductors employ thick electroless copper plating. However, thin electroless copper followed by primary electroplating is preferred for boards having fine-line conductors, because a considerable amount of surface is brushed off for better adhesion of dry film. This provides a higher reliability for PTHs. Solder reflow boards had been preferred by many customers, particularly in military and telecommunications applications, until the emergence of hot-air solder coater levelers. Although the solder-over-copper conductors protect the copper from oxidization, solder reflow boards have some limitations. Solder mask is hard to apply over reflowed solder, and it tends to wrinkle and peel off in some areas when the boards go through component soldering. A more serious problem is the solder bridging that occurs when the conductor width and clearance become very small. In step 9, the entire surface of the board except for the pads is covered by solder mask, and then the board is immersed into the hot-air solder coater leveler, resulting in a thin coating of
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