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INFLUENCE OF DESIGN ON RELIABILITY
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Design has a major influence on the reliability of any product. The implications of the demands of the application and expected service environment on product design should be considered as early as possible, since they can influence a wide range of decisions, including integrated circuit partitioning, package and substrate selection (which will impose specific design rules and electrical performance characteristics), component layout and box design, and heat sinking and cooling. IPC Standard D-279, Design Guidelines for Reliable Surface Mount Technology Printed Board Guidelines, is a good place to start in considering these issues. Section 57.2 has already described how design can promote or hinder certain failure mechanisms. Section 57.4 discusses the influence of materials, which are selected during the design process, on PCB and interconnect failures. This section highlights the importance of good thermal and mechanical design. The size of the thermal cycles imposed on the PCA during power on/off cycles can have an overwhelming influence on the reliability of integrated circuits, solder joints, and platedthough-holes, especially if the external service environment is not particularly severe; consequently, good thermal design is critical to reliability. The thermal cycles imposed on the assembly can come from joule heating from high-power components and from ambient heating. Integrated circuit reliability depends on maintaining low enough junction temperatures, usually below 85 to 110 C, depending on the IC technology. During continuous operation, solder joint temperatures should be kept below about 90 C to avoid the extensive intermetallic growth and grain coarsening that occur during long-term exposure to higher temperatures. As described under Sec. 57.2.1.1 and 57.2.2.1, the size and number of thermal excursions directly affect the fatigue life of both solder joints and plated-though-holes. Component spacings, orientations, air velocities, and enhancements such as thermally enhanced packages, heat sinks, and fans can all have major effects on the thermal cycle experienced by the assembly. PCBs can also be enhanced with metal cores to improve heat dissipation. As mentioned in the earlier descriptions of specific failure modes, package selection and via and PTH specification can have a major effect on reliability. Although small holes can be desirable from a design density perspective, use of the smallest holes (aspect ratios of 5:1 or greater) should be minimized to minimize the risk of PTH failures.This is especially true if the design includes large through-hole parts which are likely to be reworked frequently (for example, due to test escapes). Similarly, some package styles are more susceptible to solder joint fatigue than others. The effect of integration on reliability can depend on the difference in package styles for the options under consideration. Integration can have a positive effect by reducing the total number of connections that could fail. On the other hand, if it requires a large package with a large CTE mismatch to the substrate, integration may reduce the reliability of the assembly. The effect of externally imposed mechanical shock and vibration on PCA reliability is largely determined by design factors, although substrate and package selection also play a role. Component placement and PCA mounting in the box determine the natural frequency of the board and, consequently, the extent to which the board deflects. High-mass packages, often due to large heat sinks, are particularly susceptible, especially if there is a large lever arm.
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57.4 IMPACT OF PCB FABRICATION AND ASSEMBLY ON RELIABILITY
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57.4.1 Effect of PCB Fabrication Processes 57.4.1.1 Laminate and Lamination. Delamination in PCBs may occur between the laminate materials or between the laminate material and the Cu foil. One cause of delamination is defective laminate material. Defects such as incomplete bonding at the resin/fiber interface can result in delamination due to formation of voids at these interfaces. Other common causes of delamination are excessive lamination pressure and/or temperature, contamination at interfaces, heavily oxidized copper foil surfaces, and lack of oxide treatment to enhance adhesion between copper innerlayers and prepreg. Debonding increases the risk of conductive anodic filament growth because it provides a place for moisture to accumulate. It can also result in increased stresses on the plated-through-holes (PTHs) during thermal cycling. Laminate voids and resin recessions are separations of the laminate material from the copper conductor that may occur during multilayer PCB lamination. Most acceptability specifications prohibit voids larger than 0.076 mm (0.003 in); however, smaller voids are not generally considered to be detrimental to reliability. Some of the causes of laminate voids are entrapped air during lamination, improper flow of resin, and improper epoxy cure, perhaps due to improper lamination pressure and/or temperature, inappropriate heating rate, or too little prepreg. 57.4.1.2 Cu Foil. The major cause of innerlayer foil cracks seems to be poor ductility of the Cu. Poor foil ductility can have a more significant effect on PTH reliability than such well-known culprits as insufficient plating thickness and excessive etchback. A minimum of 8 percent elongation is required for 1-oz foil to eliminate this problem. Foils plated in a Hull cell can be easily evaluated for room-temperature ductility using a 180 bend test. This technique is illustrated in Fig. 57.15, in which the sample panel is bent flat parallel to the axis along which current is varied.26 Fractures occur at current densities producing low-ductility copper. This test can also be used to evaluate the influence of bath chemistry on ductility or as a bath monitor. Poor copper ductility can be correlated to the microstructure observed in metallographic cross sections.27 57.4.1.3 Drilling and Desmear. Poor drilling and desmear (etchback) can cause PTH failures by providing stress concentrations that cause fatigue cracks to initiate. They can also cause voids and cracks at the interface to the copper FIGURE 57.15 Ladwig panel ductility test. (After Ref. 26.) plating, which can trap chemicals during plating and then contribute to conductive anodic filament growth.The following paragraphs describe the effects of poor desmear and some drilling defects which can cause poor plating, such as resin smear, rough walls, loose fibers, and burrs. Resin smear can cause weak connections between plated-through-holes and innerlayer copper that fail under environmental stress. There is always some resin smear, which is removed by the desmear (etchback) process. If the desmear process is not effective, or if the resin smear is excessive, poor interconnection to the innerlayers can result. Possible causes of excessive smear are a dull drill or the wrong feed rate or drill speed, all of which can cause increased drill heating, resulting in more smear.
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