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FIGURE 58.4 Cross-section of a ceramic solder column carrier and ceramic ball grid array (CBGA). Solder column carriers (SCC) and a solder ball carrier (SBC) are shown. The SBC is often referred to as a CBGA package due to the fact that it is a ceramic package substrate that employs solder balls to create a second-level interconnect between the package substrate and the PWB.The solder column carrier employs a column of high-lead solder (which is either casted onto the ceramic package substrate or attached by a layer of eutectic 63Sn/37Pb solder paste) to create a second-level interconnect between the ceramic package substrate and the PWB. A lead-free version of the SCC, made of copper columns is also being developed.2 Typical ceramic ball grid array packages cannot achieve required reliability when body sizes exceed 32 mm per side. Ceramic packages having larger body sizes either employ SCC-type technology or connectors to create a second-level interconnect. (Reprinted with permission from J. Lau, Ball Grid Array Technology, McGraw-Hill, New York, 1995, p. 27.)
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Moreover, at higher speeds, there is an ever increasing need for reduction in signal delay between processors and the memories they communicate with.These processors could be microprocessors, network processors, programmable logic devices (PLDs) and application-specific integrated circuits (ASICs). This has given rise to the prominence of System-in-Package (SiP) modules which significantly reduce the delay between on-PWB memory and ASICs (Fig. 58.5).
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FIGURE 58.5 System-in-Package (SiP) Module. SiP modules help reduce signal delay between a processor and the memory devices it communicates with. This SiP has one processor in the middle, surrounded by four discrete memory packages, all on one module. The module is soldered to the PWB via the solder balls on the back side of the module substrate.
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FIGURE 58.6 (a) Stacked-die package. Several dies are stacked within a single package and wirebonded to a single substrate. (b) Stacked package. Several wirebonded packages are stacked on top of each other with solder balls. (Courtesy of Amkor Technology, Inc.)
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SiP modules can have more than eight memories communicating with a single ASIC.The ASIC package is typically a flip chip, whereas the memories could be CSPs, stacked packages or PBGAs. Stacked die and stacked package memories have also become more prevalent in applications where space is a constraint (Fig. 58.6). Stacking helps compact more memory within the same foot print and in applications where height is not a critical constraint, they help conserve valuable PWB real estate while at the same time providing greater integration and performance. But stacking technology raises its own unique set of reliability challenges. These challenges include heat dissipation from the multiple dies, reworkability and the reliability of the interconnects between the individual stacked dies or stacked packages.
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Electronic packages are composed of complex materials that are assembled via intricate processes and then subjected to a wide range of service environments. It is crucial to note that both the die-packaging processes and surface-mount technologies can impart stresses and create residual stresses in the final packaged assembly that impacts its interconnect reliability.Assessing the reliability of package devices requires that all variables that can hinder or enhance reliability be considered.
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Actual Product Environment The actual product environment is what drives the reliability of the assembly. Printed circuit assemblies are deployed in a wide range of environments. Packages can be subjected to extreme temperatures and humidity. Automotive applications, for example, can see temperature ranges from 55 C to well over 95 C3 along with up to 100 percent humidity. The rate at which temperature and humidity changes occur can be quite severe under the hood, causing components to transition from extreme cold to heat in a matter of minutes. This creates a very difficult environment to model, as the rate of occurrence of thermal and humidity cycles must be thoroughly understood. Severe shock and vibration can also be imparted to assemblies in this type of service environment, which adds to the complexity of reliability assessment. Great care must be taken when assessing these types of aggressive environments and their impact on packaging reliability. A thorough experimental analysis that employs thermocouples (to assess temperature conditions) and accelerometers (to assess shock and vibration loading conditions) should be employed to determine the actual end-use environmental conditions. These stressful environments are the primary driver for automotive applications
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