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Lid Flip-chip Bumps Lid Adhesive Silicon Die Multi-Point Mesh Constraints Underfill Substrate BGA Copper Pad BGA Solder Ball PWB
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FIGURE 59.18 Three-dimensional submodel detail showing the flip-chip bumps and underfill included in the model. The submodel can be used to determine the fatigue life of the flip-chip bumps and the BGA solder joint underneath at the same time.
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only at the board-level interconnect but also at the first-level interconnect (between the silicon die and substrate). The flip-chip bumps are encapsulated by the underfill to improve their thermomechanical reliability by evenly distributing the CTE-mismatch-induced strains between the die and substrate. If the underfill material properties are such that the underfill softens drastically above its Tg, then there is a possibility that the flip-chip bumps may fail early during thermal cycling.52 To simulate this, the global-submodel approach outlined earlier can be used. In this case, the flip-chip bumps would also be incorporated in the submodel as shown in Fig 59.18. 59.4.2 FEA for Monotonic Bend Testing FEA simulations of monotonic bend testing involve a quarter-symmetry model of the assembly placed between anvils and deformed while monitoring the strains induced in the package, solder joint interconnects, and the PWB. The details of the quarter-symmetry model are shown in Fig. 59.19.
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FIGURE 59.19 Three-dimensional quarter-symmetry model showing an FCBGA package mounted on a PWB between support anvils. Contact elements between the anvils and the PWB simulate the flexure of the PWB as one anvil set is moved vertically relative to the other. Detail A of the model is shown in Fig. 59.20.
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COMPONENT-TO-PWB RELIABILITY
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Bend test FEA simulations achieve two primary objectives:
To determine the relationship between PWB strain and critical joint strain. This in turn helps bridge differences between the controlled conditions in which the bend testing is performed and the conditions in which bending occurs during assembly. To perform a comparative assessment of different packages. FEA can be used to derive solder joint strains from experimental PWB strain data for different test conditions.
The FEA model is shown in Figs. 59.19 and 59.20. Solid structural elements are used to model the PWB, solder joints, and package details. Based on the premise that at high strain rates, the solder material becomes brittle and behaves almost like a linear elastic material, the solder joint elements are modeled as linear elastic. Contact elements are used at the interface between the PWB and anvils to simulate contact between the PWB and the anvils as the assembly is deformed. The solder joint geometry is modeled as closely as possible to the solder joints actual shape after reflow.
Grease Underfill Lid Silicon
Substrate
FIGURE 59.20 Detail A of the image model shown in Fig. 59.19. The image on the left shows the package (quarter-symmetry). The zoomed-in image on the right shows all the details of the FCBGA package construction.
A variety of different parametric analyses can be performed to determine the effect of different geometric variables on the critical joint strain. A few examples of such analyses are described in this section. 59.4.2.1 Strain Distribution Around the Package. Per IPC/JEDEC-9702, it is recommended that three strain gauges be placed around a package during four-point bend testing (see Fig. 59.21). These gauges are to be used to characterize the strain response of the given package
Strain Gauges
Anvils
Package
FIGURE 59.21 Nomenclature for the four-point bend test set up as outlined in IPC/JEDEC9702. Three strain gauges are placed on the board to measure the strain distribution around the package. Gauge 1 is placed under the package, directly below the corner most solder joint. Gauge 2 sits directly below the package center. Gauge 3 is placed next to the package on the PCB topside, midway between the package edge and the anvil.
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