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FIGURE 27-3 Computer control system.
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SAMPLED-DATA CONTROL SYSTEMS
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signal from an impulse-modulated sampling switch. Since this signal from the switch is a pulsed signal, it is given the symbol M* in the diagram. At the outset of this discussion, the reader should realize that the components enclosed in the dotted line do not represent any physical components or hardware; they are simply mathematical symbols that aid in deriving the control algorithm. From Fig. 27.3, we may write M(z) = D(z)E(z) To obtain the algorithm in the form of Eq. (27.1), D(z) may be written D(z) = go + glz- + 822-2 + .*a = M(z) E(z) 1 + htz- + h2z-2 + ... (27.4) (27.3)
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Cross-multiplying this expression and solving for M(z) give M(z) = goE(z)+glz- E(z)+...-{hlz- M(z)+h2z-2M(z)+...} (27.5) Recognizing the term z - E(z) to be equivalent to the Z-transform of the error delayed by i sampling periods, e(nT - i T), we may write Eq. (27.5) in the time domain as m(nT) = goe(nT) + gle[(n - l)T] + g2e[(n - 2)T] + *a* -{hlm[(n - l)T] + h2m[(n - 2)T] + *.a} (27.6)
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Since this expression matches Eq. (27. l), we see that Eq. (27.4) is a satisfactory expression for D(z).
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Before the details of the design method for digital control algorithms are presented, the performance specifications for the control system will be listed. The minimal prototype response of Bergen and Ragazzini (1954) considered the response of the system only at sampling instants. The requirements for the minimal prototype response are given in the following list. 1. The compensation algorithm must be physically realizable (i.e., no prediction is needed by the algorithm). 2. The output of the system must have zero steady-state error at sampling instants. 3. The output should equal the set point in a minimum number of sampling periods. However, for the practical application of a digital control algorithm to a real system, several additional requirements are important. These are: 4. The digital control algorithm should be open-loop stable. 5. Unstable or nearly unstable pole-zero cancellations should be avoided, since exact cancellation in real processes is impossible, and the resulting closed-loop system may be unstable or excessively oscillatory.
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OF SAMPLED-DATA CONTROLLERS
6. The design should consider the entire response of the system in order to eliminate hidden oscillations (intersample ripple). 7. In addition to the system output responding in a desired manner to the input disturbance selected for the design of the control algorithm, the system output should be satisfactory for other possible disturbances. These additional constraints are necessary to ensure that the proposed algorithm will perform satisfactorily on real systems. To meet these requirements, the resulting system may respond with a settling time longer than the minimal prototype settling time (item 3 in the preceding list). The concept of a minimum settling time is used only as a theoretical performance criterion. In real systems, where modeling error and noise are present, it is not possible to bring the state of the system completely to rest. This does not negate the value of the theoretical concept of minimum settling time, because systems designed to meet this requirement are likely to give satisfactory performance in tests on real processes. In addition, all digital control algorithms to be presented hem contain the equivalent of an integrator, which ensures zero steady-state offset for step disturbances, regardless of modeling error and the location of the disturbance in the loop. Finally, the minimal prototype response concept provides the basis for a systematic approach to the design of digital control algorithms.
Analysis and Design of Sampled-Data Controllers
From Fig. 27.3, we may write directly from observation E(s) = R(s) - GpGh(s)M*(s) and M*(s) = D*(s)E*(s) Taking the Z-transform of each equation gives E(z) = R(z) - GpGtz(zW(z) - UG,(z) M(z) = D(z)E(z) Combining the last two equations gives (27.9) (27.10) (27.8) - UG,(s) (27.7)
R(z)
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