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load-store architecture: A processor architecture in which the memory is accessed using only the load and store commands. No other operations are allowed on the memory contents directly. logic analyzer: An instrument to observe digital signals as a function of time. The logic analyzer has a fluorescent or LCD display that displays the digital signals. logic gate: A digital circuit that has one or more inputs and an output. It performs a logical operation (such as AND, OR, XOR, XNOR, NAND, NOR, NOT) on the inputs and produces a result on the output. microcomputer: A Microprocessor and associated support circuitry, peripheral I/O components, and memory (program as well as data) put together to form a small computer specifically for data acquisition and control applications. microcontroller: A microcomputer on a single chip. microprocessor: A Central Processor Unit (CPU) on a single chip. mnemonic: An abbreviation, an aid for remembering the code of a processor. NVRAM: Acronym for Non-Volatile Random Access Memory. RAM with battery backup for retaining the contents of the RAM when the main power is put off. oscilloscope: An instrument to observe electrical signals as a function of time. It has a fluorescent or LCD display for observing the signals. object code: A program that a processor can execute directly. pipeline: Refers to an internal implementation of a processor in which the instructions are continuously being fetched by a section of the processor and placed in a queue for execution by the execution section of the processor, which in turn places the results in an output queue to be stored back to the designated destination. A nonpipelined processor, on the other hand, fetches an instruction, executes it, and stores the results before fetching the next instruction. Pipelining improves overall execution speed because of overlapping of the various stages of program execution. PLD: Acronym for Programmable Logic Device. A digital circuit whose functionality can be changed as per the logic required. The PLD has a combination of AND, OR, and NOT gates connected through a network. By choosing the right gates and the right interconnects, the PLD can be made to implement any logic function. program counter: Same as Instruction Pointer. PWM: Acronym for Pulse Width Modulation. In PWM, the pulse width of the frequency is changed while keeping the frequency constant. This changes the DC value of the signal. For low width pulse, the DC value is smaller than a pulse of higher width. RAM: Acronym for Random Access Memory. A memory device any part of which can be accessed directly. In the early days of computing, this was contrasted with tape memory, which was sequential access memory. Now RAM usually means some sort of volatile, read/write memory. RISC: Acronym for Reduced Instruction Set Computer. A type of computer architecture with a small number of minimum instructions, characterized by a very regular instruction structure of fixed length, a load-store approach to memory access, and a large number of registers. Contrast it with CISC. reset: To restart. A signal in a processor that initializes the internal register and control circuit to a default value and starts executing the program from the first memory location. reset vector: Address of the reset code.
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GLOSSARY 329
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reset address: The address that the processor first accesses for the first instruction, after the reset signal is applied. reset pointer: Address of the reset code. reset code: The program that the user writes as part of the system initialization. RMS: Acronym for Root Mean Square. A way to express the value of the signal by averaging the square of the signal over a full cycle of the signal and then taking the root of the average quantity. The 220-V or 115-V wall outlet voltage in most countries is an RMS value. For a sine wave, the peak signal is about 1.4 times the RMS value of the signal. RS-232: A protocol for serial asynchronous transfer of data. simplex: Used in communication. Simplex refers to communication in only one direction and not in the reverse direction. simulator: A software for monitoring the execution of a program. Simulator allows the user to execute the program instruction by instruction and inspect register, memory, and I/O port contents. The simulator allows sections of program to run at full speed by placing break points. SPI: Acronym for Serial Peripheral Interconnect. A four-wire serial synchronous serial communication protocol between two devices or ICs. stack: A read/write storage space used for storing the return address of a calling program. The stack has a Last In First Out structure. The value written last is read first. stack pointer: An address register that points to the current top location in the stack. startup code: A section of a program that is executed for system initialization at the very beginning. timer: A counter that is incremented by a clock signal. target device: Refers to the processor in the target system that is under development. UART: Acronym for Universal Asynchronous Receiver Transmitter. A serial communication device or IC that converts a byte of data into serial bits and transmits it out at a certain rate. Similarly, it receives incoming serial bits and assembles these bits into a byte for the host. watchdog timer: A special timer that is used specifically for the purpose of resetting the system if it overflows. A piece of program resets the watchdog timer every so often before the watchdog timer expires. However, if the program fails to reset the timer, indicating that the program has crashed or entered into some infinite loop (indicating unwanted and unexpected program or system behavior), the watchdog timer overflows and this generates a processor reset signal.
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