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Figure 6.4 Connecting AT90S8515 to a PC serial port. Other components that go with MAX232 are not illustrated.
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108 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
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init_uart: ldi rtemp, baudrate ;set baud rate out UBRR,rtemp ldi rtemp, $18 ;initialize UART control register out UCR, rtemp ret ;******************************************************* ;RXCOMP: Receive a byte from the serial port ;polls the RXC flag in the UART Status Reg (USR) ;if 1 , then data is read from the UART Data Register (UDR) ;******************************************************* rxcomp: sbis USR,RXC ;poll to check if char received rjmp rxcomp in rreg,UDR ;put received data in rreg ret ;******************************************************* ;TXCOMP: Transmit a byte from the serial port ;polls to see if the UDRE flag is 1 . If 1 then ;a byte is written to the UDR to be transmitted. ;******************************************************* txcomp: sbis USR,UDRE ;poll to check end of transmission rjmp txcomp out UDR, treg ret
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For those processors that do not have a built-in UART, we describe a software-driven serial port. A software-driven serial port can only be half duplex, meaning that either the serial data can be received or it can be transmitted. A hardware UART, on the other hand, can be full duplex, as the data transmission and reception are being handled by hardware registers that do not need any program intervention in the actual bit-shifting process. Figure 6.5 illustrates the timing involved in a RS-232 transmission. To receive a serial bit stream, the program must monitor the signal (the TTL signal as illustrated in the figure). The idle state of the serial TTL signal is 1 . As soon as a low-going transition is detected, it denotes the beginning of the Start bit and the start of a transmission. The program just monitors the signal again at T/2 time later, which is denoted as the 0th sample. T denotes the bit time. For a 2400-bps speed, the bit time T 1 2400, which is about 416 us. Thus after ensuring that the signal is still 0 , the program then just samples the TTL signal at each T time interval after the 0th sample at sample points denoted by 1, 2, 3, etc. The program just records the logic at these sample intervals and shifts the recorded logic values in a register. At the end of eight sample points, the data byte is ready. Serial data transmission is easy compared to receiving it. The program just generates a start bit for T time units and then shifts out the data to be transmitted, each bit lasting T time units. To get the timing intervals, the AVR processor can use the Timer0 timer, which is available in all the AVR processors. The software-driven data transmission and reception routine that is included on the CD in fact interfaces directly to the RS-232 port without using any MAX232 type of line converters. The level conversion from RS-232 level to TTL is performed with a few resistors and diodes. The signal inversion is performed in software. For transmission, the TTL data can be directly put on a RS-232 line, and the PC will receive it correctly (the data must be inverted in logic, though). A working example of this approach is illustrated in a later chapter, and the circuit diagram is illustrated in Figure 17.7. Serial driver (bit-banging method) test code for Figure 17.7 is available in the code directory in file ser_drv.asm.
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T/2 0 1 2 3 4 5 6 7 8 9 Stop Bit Data Bits
Figure 6.5 Timing the RS-232 signal. The first bit is the Start bit and the last bit is the Stop bit.
110 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
6.6 Expanding I/O
The AVR processors are available many different pinouts, with different I/O resources, depending upon the number of pins in the particular processor. In some cases, you may feel the need for additional I/O pins than are available. There are many ways to expand the number of I/O pins with the help of shift registers or port expanders with a SPI or I2C interface. This section discusses means of expanding I/O. The primary requirement is that the I/O expansion scheme should have some serial format so as to take up minimum I/O pins on the processors. Serial Shift registers are great for such applications. Usually, these shift registers are of the serial-in and parallel-out or parallel-in and serial-out format, which suits our requirement. There are many bidirectional I/O expansion ICs with a 2-wire I2C interface available that are, of course, the best in terms of minimum pin usage.
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