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BC557 R3 4K7 0.1 uF 200 ohm PB0 (+vin) R4 PB1 (-vin) Vin AVR with Analog Comparator
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Figure 6.14 Block diagram for an improved analog-to-digital converter using the on-chip comparator on an AVR processor.
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INTERFACING ANALOG-TO-DIGITAL CONVERTERS 117
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BC557 R3 4K7 0.1 uF 200 ohm PB0 (+vin) R4 PB1 (-vin) +5V R5 10K AVR with Analog Comparator
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Figure 6.15 Block diagram for a temperature sensor interface to the comparator-based ADC.
perature (20 C, which is 393 K), the voltage would be 3.93 V A simple AT90S1200 can be . used for this application and the data can be either stored in the internal EEPROM or transmitted to a PC using the software-driven serial link as described in a previous section.
MAX186
MAX186 is a 12-bit, 8-channel serial ADC system with built-in voltage reference, internal sample and hold amplifier, and multiplexer. The ADC offers various modes of operation such as single-ended conversion, differential conversion, sleep mode, etc. The maximum current conversion is 2 mA and 100 A during low power modes (sleep mode). MAX186 is a complete ADC system combining an 8-channel analog multiplexer, sample and hold amplifier, serial data transfer interface and voltage reference, and a 12-bit resolution successive approximation converter. All of these features are packed into a 20-pin DIP package (other packaging styles are also offered). The IC consumes extremely low power and offers power-down modes and high conversion rates. The power-down modes can be invoked in software as well as hardware. The IC can operate from a single 5-V as well as 5-V power supply. The analog inputs to the ADC can be configured via software to accept either unipolar or bipolar voltages. The inputs can also be configured to operate as single-ended inputs or differential inputs. The ADC has an internal voltage reference source of 4.096 V, but the user can choose not to use this reference and supply an external voltage between 2.50 V
118 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
and 5.0 V This gives the user the advantage of adjusting the span of the ADC according . to the need e.g., if the input analog voltage is expected to be in the range of 0 to 3.0 V, then choosing a reference voltage of 3.0 V will provide the user with the entire ADC input range with a better resolution. This ADC is an extremely fast device. It can convert at up to 133000 samples per second at the fastest serial clock frequency. This ADC is best suited for devices that can generate fast serial-controlled clocks e.g., DSPs and microcontrollers such as the AVR. Figure 6.16 illustrates the block diagram of the ADC and the various associated signals. The description of the ADC signals is listed in Table 6.1.
MAX186 DATA CONVERSION AND READOUT
While the many details of this very fine ADC can be had from the IC manufacturer data sheets, our intention here is to see how we can connect this device to the AVR processor to begin with and how a conversion can be initiated and the result read out into the AVR processor. To initiate a conversion, the ADC must be supplied with a control byte. The control byte is input into the ADC through the Din signal input. To clock the control byte, either an internally or externally generated clock signal (on SCLK pin) could be used. To keep the hardware small and simple, it is necessary to use the external clock mode. The format of the control byte is illustrated in Figure 6.17.
MAX186
CS* SCLK Din SHDN* CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 AGND Dout SSTRB Vdd DGND Vss REFADJ Vref
Figure 6.16 Block diagram of MAX186 ADC.
INTERFACING ANALOG-TO-DIGITAL CONVERTERS 119
TABLE 6-1 SIGNAL NAME
ADC MAX186 SIGNALS AND THEIR FUNCTIONS FUNCTION
CS* SCLK Din SHDN*
Active low-chip select input Serial clock input. Clocks data in and out of the ADC. In the external clock mode, the duty cycle must be 45% to 55%. Serial data input. Data is clocked at the rising edge of SCLK. Three-level shutdown input. A low input puts the ADC in low-power mode and conversions are stopped. A high input puts the reference buffer amplifier in internal compensation mode. A floating input puts it in external compensation mode. Analog inputs. Analog ground and input for single-ended conversions. Serial data output. Data is clocked out at the falling edge of SCLK. Serial strobe output. In external clock mode, it pulses high for one clock period before the MSB decision. Digital ground. Positive supply voltage. Negative supply voltage. 5 volts 5%. 5 volts 5% or AGND.
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