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Figure 6.46 EEPROM random read.
148 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
Figure 6.47 Circuit schematic for an AT90S2313 processor interface to a serial EEPROM.
+5V .1 uF Vcc(20) RESET(1) X2(4) X1(5) AT90S2313 PB2(14) PB3(15) .1 uF PB1(13) Gnd(10) I/O RST SCLK Gnd DS1302 Vcc1(Battery) Vcc2
3.58 MHz 22 pF 22 pF
Figure 6.48 RTC interface to an AT90S2313.
ACCESSING A CONSTANTS TABLE 149
Figure 6.49 Circuit schematic for an AT90S2313 processor interface to an RTC.
6.15 Accessing a Constants Table
Most AVR processors have on-chip flash program memory as well as some amount of EEPROM. Both these memories can be used to store constants. If the constants are stored in the EEPROM, they can even be modified, while the constants stored in the flash program memory cannot be changed expect while programming the flash program memory of the chip. The constants are stored in the program memory either at a predefined address (using the appropriate origin assembler statement such as .org for the Atmel s AVR assembler) or by identifying the start of the constants table with a label, as in the example below.
msg1: .db Honk! Honk! Honk! Honk!
To access an individual element of the table, say the tenth from the start of the table, the following program is used.
150 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
ldi ZH, high(msg1*2) ;init the pointer register ldi ZL, low(msg1*2) adiw ZL, 10 ;add an offset to the pointer more1: lpm ;read program memory. ;data is now available in register R0
Similarly, constants and tables can be stored in the EEPROM memory. The assembler program must contain the .eseg directive to instruct the assembler to locate the following data in the EEPROM memory map.
.eseg org 0 ;Start of the message morse_msg: .db 2 .db 16
;C ;Q
Accessing the EEPROM is done as follows:
ldi ZL, low(morse_msg) eep_notrdy: sbic EECR,1 ;skip if EEWE clear rjmp eep_notrdy ;Waits until EEPROM ready read: out EEAR, ZL ;output address low sbi EECR, 0 ;set EERE (Read-strobe) nop nop in R18, EEDR ;inputs data
6.16 Arbitrary Waveform Generation
Generating digital waveforms for various applications is often required, either as a part of a design requirement or as a test pattern generator. Multichannel digital waveform generators are extremely expensive pieces of instruments. Often, you can use a digital circuit to provide a limited functionality of this expensive instrument. The AVR, with its extremely fast program execution, is quite capable of generating fast, multichannel digital waveforms. An example of what an arbitrary digital waveform might look like is illustrated in Figure 6.50. The required waveform is drawn on a sheet of paper and then encoded as numbers as illustrated in figure wave1. These numbers are then put in a constants table in a program. The waveform generation program outputs the values of the table onto a port which provides the waveform outputs. Figure 6.51 illustrates one of the waveform patterns being generated by an AT90S8515 processor. The waveform generator code is available on the CD in the code directory in the file wave1.asm.
6.17 A Switch-Case Implementation
The Switch statement is a popular statement used extensively in C. It is essentially a chain of if/else statements. The following code illustrates how a switch-case structure can be implemented on the AVR.
A SWITCH-CASE IMPLEMENTATION 151
Figure 6.50 An arbitrary waveform example.
Figure 6.51 An arbitrary waveform generated by the AVR processor and captured on a logic analyzer.
152 HARDWARE AND SOFTWARE INTERFACING WITH THE AVR
.equ option1= A .equ option2= B .equ option3= C .equ option4= D .equ option5= E .equ option6= F .def rreg=r18 ;*********************************************** ;Subroutine to implement a switch-case statememt ;*********************************************** sub_case: rcall get_byte ;get an argument begin_case: cpi rreg, option1 ;check if argu=option1 brne chk2 ;else compare with option2 rcall sub_opt1 ;if yes execute subroutine ;sub_opt1 chk2: cpi rreg, option2 ;check if argu=option2 brne chk3 ;else compare with option3 rcall sub_opt2 ;if yes execute subroutine ;sub_opt2 chk3: cpi rreg, option3 ;check if argu=option3 brne chk4 ;else compare with option4 rcall sub_opt3 ;if yes execute subroutine ;sub_opt3 chk4: cpi rreg, option4 ;check if argu=option4 brne chk5 ;else compare with option5 rcall sub_opt4 ;if yes execute subroutine ;sub_opt4 chk5: cpi rreg, option5 ;check if argu=option5 brne chk6 ;else compare with option6 rcall sub_opt5 ;if yes execute subroutine ;sub_opt5 chk6: cpi rreg, option6 ;check if argu=option6 brne chk_default ;nothing matches. rcall sub_opt6 ;if yes execute subroutine ;sub_opt6 ret chk_default: rcall sub_default ;else execute a default ;subroutine ret
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