barcode reader in asp.net Copyright 2008, 2002, 1997 by The McGraw-Hill Companies, Inc. Click here for terms of use. in Software

Generation QR-Code in Software Copyright 2008, 2002, 1997 by The McGraw-Hill Companies, Inc. Click here for terms of use.

Copyright 2008, 2002, 1997 by The McGraw-Hill Companies, Inc. Click here for terms of use.
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THE MICROCHIP PIC MCU PROCESSOR ARCHITECTURE
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13 Program Counter
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Data Bus <8>
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Port A RA0-RA3
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EPROM
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Program memory 1K 14 Program Bus <14> Instruction Reg. Direct Addr <7> 8 Level Stack (13 bit)
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File Registers 36 8 RAM Addr <9> Addr Mux Indirect Addr <8> FSR STATUS Reg RB0/INT RB1/RB7 Port B RA4/T0CKI
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OSC1/ CLKIN OSC2/ CLKOUT
MCLR
VDD, VSS
Timer 0 Higher order bits are from STATUS register
PIC16C61 block diagram.
The CPU
In the microchip datasheets you will nd that the PIC microcontroller s processor is described as a RISC-like architecture . . . separate instruction and data memory (Harvard architecture). In this chapter I want to explain what this means for people who do not have Ph.D.s in computer architectures, as well as help explain how application code executes in the PIC MCU processor. The processor may seem to be very complex and different from other devices you ve worked with before, but I believe that it is very intelligently designed and works in a very logical manner. Despite the complex written description of the processor, you will discover that it is actually quite straightforward and designed to simplify the implementation of many complex applications and programming algorithms. The PIC microcontroller processor can be thought of as being built around the arithmetic/ logic unit (ALU), which provides basic arithmetic and bitwise operations for the processor. There are a number of speci c-use registers that control operation of the CPU as well as input/output (I/O) registers and data-storage (RAM) registers. In this book I call the
THE CPU
Figure 6.2 diagram.
Harvard architecture block
speci c-use registers hardware registers or I/O registers depending on the function they perform. The hardware registers also allow direct manipulation of functions that usually are invisible to the programmer, such as the program counter, to allow for advanced program functions. Data-storage (RAM or variable) registers are called le registers by Microchip. The registers are completely separate from the program memory and are said to be in their own spaces. This is known as Harvard architecture and is shown in Fig. 6.2. In the gure, note that the program memory and the hardware to which it is connected are completely separate from the register space. This allows program memory reads for instructions to take place while the processor is accessing data and processing it. This capability allows the PIC microcontroller to execute software faster than many of its contemporaries. Instruction execution takes place over four clock cycles, as shown in Fig. 6.3. During an instruction execution cycle, the next instruction to be executed is fetched from program memory. When the next instruction is executing, the processor is fetching the next instruction after it. After an instruction has been fetched and is latched in a
Q1 - Latch in Fetched Instruction - Increment PC Q2 - Input Register/Data Load Q3 - Operation Q4 - Result Save
1 Instruction Cycle
Figure 6.3 Four clock cycles, each performing its own task, make up a single instruction cycle.
THE MICROCHIP PIC MCU PROCESSOR ARCHITECTURE
holding/decode register, the program counter (used to address which instruction is being executed) is incremented. This is known as Q1. Next (Q2), data to be processed (often with the data in the accumulator or working register, which will be described below) is read and put into temporary buffers. During Q3, the data-processing operation takes place. Finally, the resulting data value is stored during Q4, after which the process repeats itself for the next instruction (which is put into the holding register while the current instruction is executing). These four cycles that take place with each tick of the clock are known collectively as an instruction cycle. Since the instruction cycle is made up of the four Q cycles, which is equivalent to four clock cycles, the instruction execution speed is said to be one-quarter the clock speed. For example, an application that has a 4-MHz clock would be running 1 million instruction cycles per second (MIPS). In the PIC18 processors, there is a built-in phasedlocked loop circuitry that multiplies the external clock s speed four times. This means that for PIC18 chips with the phased-locked loop active, the instruction cycle is equal to the chip s clock. There are three primary methods of accessing data in the PIC microcontroller. Direct addressing means that the register address within the register bank (explained below) is speci ed in the instruction. If a constant is going to be speci ed, then it is speci ed immediately in the instruction. The last method of addressing is to use an index register that points to the address of the register to be accessed. Indexed addressing is used because the address to be accessed can be changed arithmetically. In other processors, there are additional methods of addressing data, but in the PIC microcontroller, these are the only three. When accessing registers in the mid-range PIC microcontrollers directly, 7 address bits are explicitly de ned as part of the instruction. These 7 bits result in the ability to specify up to 128 addresses in an instruction, as shown in Fig. 6.4.
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