barcode reader in asp.net Microcoded processor with memory Figure 1.6 storing individual instruction steps. in Software

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I should point out that having the instruction holding register wider than the program memory is not a mistake. In some processors, the program memory is only 8 bits wide although the full instruction may be some multiple of this (for example, in the 8051 most instructions are 16 bits wide). In this case, multiple program memory reads take place to load the instruction holding register before the instruction can be executed. The width of the program memory and the speed with which the instruction holding register can be loaded into is a factor in the speed of execution of the processor. In Harvard-architected processors, like the PICmicro, the program memory is the width of the instruction word and the instruction holding register can be loaded in one cycle. In most Princeton-architected processors, which have an 8-bit data bus, the instruction holding register is loaded through multiple data reads. A hardwired processor uses the bit pattern of the instruction to access speci c logic gates (possibly unique to the instruction) that are executed as a combinatorial circuit to carry out the instruction. Fig. 1.7 shows how the instruction loaded into the instruction holding register is used to initiate a speci c portion of the execution logic that carries out all the functions of the instruction. Each of the two methods offers advantages over the other. A microcoded process is usually simpler than a hardwired one to design and can be implemented faster with less chance of having problems at speci c conditions. If problems are found, revised steppings of the silicon can be made with a relatively small amount of design effort. An example of the quick and easy changes that microcoded processors allow was a number of years ago when IBM wanted to have a microprocessor that could run 370 assembly language instructions. Before IBM began to design their own microprocessor, they looked around at existing designs and noticed that the Motorola 68000 had the same hardware architecture as the 370 (although the instructions were completely different). IBM ended up paying Motorola to rewrite the microcode for the 68000 and came up with a new microprocessor that was able to run 370 instructions much more quickly and at a small fraction of the cost of developing a new chip.
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Figure 1.7 The hardwired processor generates each individual instruction step from execution logic arrays.
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A hardwired processor is usually a lot more complex because the same functions have to be repeated over and over again in hardware how many times do you think a register read or write function has to be repeated for each type of instruction This means the processor design will probably be harder to debug and less exible than a microcoded design, but instructions will execute in fewer clock cycles. This brings up a point you are probably not aware of. In most processors, each instruction executes in a set number of clock cycles. This set number of clock cycles is known as the processor s instruction cycle. Each instruction cycle in the PIC microcontroller family of devices takes four clock cycles. This means that a PIC MCU running at 4 MHz is executing the instructions at a rate of 1 million instructions per second. Using a hardwired over microcoded processor can result in some signi cant performance gains. For example, the original 8051 was designed to execute one instruction in 12 cycles. This large number of cycles requires a 12 MHz clock to execute code at a rate of 1 MIPS (million instructions per second) whereas a PIC microcontroller with a 4 MHz clock gets the same performance.
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