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Instruction Least Significant 9/8 Bits
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PA1-PA0 (Bits 6-5)
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Figure 6.21 Low-end PIC microcontroller program counter block diagram.
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THE MICROCHIP PIC MCU PROCESSOR ARCHITECTURE
should be changed. The equivalent low-end PIC microcontroller operation to the PCLATH/PCL updating of the program counter is
STATUS = (STATUS & 0x01F) + ((HIGH new_address & 0x0FE) << 4); PCL = LOW new_address;
In low-end PIC microcontroller code, the contents of the STATUS register are ANDed with 0x01F to reset the PA0 through PA2 bits. In the preceding formula that changes the STATUS register, note that I also delete the least signi cant bit of the upper byte of new_address. Bit 8 of the destination address can never be speci ed within the STATUS register or PCL and is always 0 as a computed address (just like it is always 0 for a call instruction). Once the correct bits for PA0 and PA1 have been calculated, they are added to the other bits of the STATUS register. Note that for call instructions, bit 8 of the new address is always 0 because the instruction word only provides an 8-bit address, and PAO becomes the ninth bit of the new address. This is the same as mid-range PIC microcontrollers ignoring the PCLATH bits, which are encompassed by the address within the page address in the instruction. This is not a problem for the goto instruction because 9 bits, which encompass a full low-end page of 512 instruction addresses, can be speci ed within the goto instruction itself. For the call instruction, which has only 8 address bits, the last 256 instructions of a low-end page cannot be accessed. For subroutines that are located in the second half of the 512 address page, the label will have to be located in the rst 256 addresses with a goto to the code in the second 256 address half of the page. Table jumps (direct writes to the PCL register) also have the same restriction as the call instruction addresses; they all must be in the rst 256 instructions of an instruction page. I suppose that larger than 256-entry tables could be created, but they would require a bit of software to calculate the jump across page boundaries to make the table appear contiguous. Previously in this chapter I discussed the idea that the unused RP bits of the midrange programming could be used as temporary ags, but I didn t recommend it. Using any of the PA bits for ags in the STATUS register never should be done. Incorrect updates of these bits that are not returned to the correct value before the next table operation, goto, or call will result in the application jump being invalid. This will be almost impossible for you to debug, so avoid any potential problems and don t modify these bits except when you are about to change your address location.
OPTION and TRIS registers When I presented the low-end register map, you might have noticed that some of the registers discussed in previous sections of this chapter were not present; these are the OPTION_REG (also known as option) and the I/O control registers TRISA, TRISB, and so on. These registers are not addressed in the register map and cannot be accessed using the traditional register read and write instructions. Instead, specialized instructions, option and tris, must be used to access these registers directly.
ARCHITECTURE DIFFERENCES
There is a bit of confusion concerning these instructions, and over the past few years, there has been a change to help minimize the confusion regarding them. The option instruction writes the contents of the w register into the OPTION register to avoid confusion, the OPTION register is identi ed as OPTION_REG in datasheets and in the register de nition les. This isn t an issue for the low-end devices because the OPTION register cannot be accessed directly, but it does cause a problem in mid-range devices, which have both the OPTION register, which can be accessed like any other register, and the option instruction, which works identically to the low-end device s instruction. To minimize the confusion, I recommend that you always refer to the OPTION register as OPTION_REG, and I have used this convention throughout this book. The tris instruction is used to copy the contents of the w register into the appropriate TRIS# register, where # is A, B, or C depending on the I/O port register being accessed. The difference between the instruction and the actual register is why the TRIS registers have not been changed like the OPTION_REG. Both the OPTION_REG and TRIS# registers in the low-end PIC microcontroller architecture cannot be read back they can only be written to. This means that some of the dynamic changes of the port I/O control bits cannot be accomplished using the bit-change instructions like they could be in the mid-range and PIC18 architectures.
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