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Figure 7.7 The PIC microcontroller goto and call instructions use the address speci ed within the instruction as well as the high order bits stored in the PC latch registers.
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architecture it is running on (the low-end PIC microcontroller architecture is often referred to as the 12-bit architecture, the mid-range as the 14-bit architecture, and the PIC18 as the 16-bit architecture). The requirement for the instruction size to stay constant means the instruction cannot hold the full number of bits needed to specify a location anywhere in the address space. The number of bits that can be stored in the goto or call instruction allows a change of execution anywhere in the page size, which is de ned as the maximum number of addresses that can be accessed by the address bits available in the instruction. The solution to this dilemma was to provide some additional address bits in a register, which are stored in the program counter when the new address is loaded into it. As shown in Fig. 7.7, the additional address bits are loaded into the program counter at the same time as the new address. Typically, these bits remain unchanged gotos normally take place within the currently executing page, which does not require a change in these bits. gotos or calls to another page require the PC latch register(s) to be loaded with the high order bit addresses before the goto or call instruction is executed. This may sound cumbersome, but it actually isn t and you may be surprised that you can do most of your PIC microcontroller application development without ever changing the PC latch registers, except in one case outlined below. Traditional conditional execution instructions are not available in the PIC microcontroller. Instead, changes in execution are typically implemented using skip instructions, which increment the program counter past the next instruction based on the state of a bit in the system. This is a tremendously powerful feature because unlike other processors that can only execute conditionally based on the results of arithmetic or Boolean operations, the PIC microcontroller can test any bit in the le register space, allowing for tests of ags or other values that would require many instructions to set up and test in other processors. The operation of the skip instruction is shown in Fig. 7.8. Later in the book, I will describe the status bit values you will have to know to be able to provide the same basic capabilities as are in other processors. Along with the ability to test and execute conditionally on the state of a variable, you can also mathematically calculate a new address to start executing at. As is shown in Fig. 7.9, an 8-bit value can be written to the low 8 bits of the program counter (known as PCL) at the same time the PC latch register bits are also loaded into the program counter, providing a completely new address for execution. This feature is most commonly
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THE MID-RANGE INSTRUCTION SET
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WREG = RegA WREG = 47 - WREG if (STATUS.Zero == 0) then skip next i = i + 1 WREG = RegB If RegA == 47 then Skip Over i = I + 1 If RegA != 47 execute i = I + 1
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Figure 7.8 The skip instructions provide conditional execution by causing execution to ignore the following instruction.
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The Mid-Range Instruction Set
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The mid-range PIC microcontroller has historically been the most popular of the architectures to learn because of the large number of part numbers with a variety of I/O and memory options. The mid-range architecture was the rst in which advanced peripherals were added, it was the rst available with EEPROM and Flash program memory, and it was the rst to have MPLAB ICD debuggers built in. They are also the devices that have the most written about them. If you were to review books and websites available for you to learn more about the PIC MCU, you would discover that the mid-range devices have vastly more material than the others. As this book is written, the mid-range PIC microcontrollers also have the most/best third-party development tools developed for them, which continues to make it a popular subject for learning as well. As I work through the instructions, I have included a diagram with the data ow for each instruction as well as the number of cycles required for the instruction to execute and the STATUS register ags that are affected. This format will be optionally used in
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