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Figure 7.20 After the bank register select bit RP0 is set, a movwf 0x20 instruction writes a value at register address 0xA0.
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The reason for this is the bsf STATUS, RP0 instruction before the second movwf, which changes the currently executing bank from 0 to 1. Now the address written to by the second movwf 0x20 is writing to the address 0x20 from the start of the bank. Since the start of the bank is 0x80, adding 0x20 to it results in 0xA0, where the byte was written to (Fig. 7.20). To return back to bank 0, all you have to do is reset RP0 using bcf STATUS, RP0. To help you understand how bank switching works, change the value in WREG, change the movwf instructions to store data at different addresses within the banks, and select different banks to see the data being written throughout the processor s register space. I do have one word of caution for you: if you write a value to the register at offset 0x2 in the bank, the program will no longer execute correctly. The arrow showing you where the instruction pointer is will disappear and will not return. The register at 0x2 is PCL, which is the least signi cant 8 bits of the program counter. Writing to this register will change the program counter to some address rather than having it increment normally. That is all there is to bank switching. What I ve just shown you probably seems too easy, especially if you tried to understand bank switching before. Changing banks is very easy, but understanding why you would like to start executing out of a speci c bank is
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Bank 1
Bank 2
INDF Register for Data IRP: Status IRP 0
Figure 7.21 To indirectly access a register, load the FSR register with the register s address and read or write to INDF.
a more dif cult topic and one that confuses many people when they are working on their rst application.
Indexed addressing Indexed addressing is a very straightforward operation in the PIC microcontroller although it is a bit unorthodox. In most processors, to implement an indexed addressing access, the index register is speci ed as part of the instruction (often enclosed in a pair of parentheses). The mid-range PIC microcontroller works essentially the same, but has a phantom register (INDF) which is accessed to cause an index read or an index write. If you are familiar with indexed addressing in other processors assembly language, you might want to mentally substitute the [indexregister] instruction parameter for the INDF register. The index register is known as FSR and is 8 bits, which gives it the ability to access up to 256 registers in bank 0 and bank 1 or bank 2 and bank 3. To select between the bank pairs, the IRP bit of the status register is used; when IRP is reset, banks 0 and 1 are selected and when IRP is set, banks 2 and 3 are selected. Figure 7.21 shows a block diagram of how the FSR and INDF registers along with the IRP bit interact. You can test out the operation of indexed addressing in the mid-range PIC microcontroller using the InsTemplate.asm program: movlw movwf movlw movwf 0xAA FSR 0xA5 INDF ; Load FSR with register in Bank 1
Store a value in the Bank 1 register
After loading in these instructions, build the program and add the FSR register to the Watch window (Fig. 7.22) then single-step through to the goto $ instruction. At this point, you will see that the register at address 0xAA has been loaded with the value 0xA5 and the FSR register will have the value 0xAA. I chose an FSR value of 0xAA because it is in bank 1 (as can be seen in Fig. 7.20), showing you that you can access bank 1 without changing the RP0 bit.
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