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The most basic way of doing this is to use the addwf PCL, f instruction to update the PIC microcontroller s program counter with the table immediately following it as the table s destination addresses. The most basic version of this subroutine could be:
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Table: addwf retlw retlw retlw retlw retlw retlw ; Return Table Value for Contents of w ; Add the Table Index to the Program Counter ; ASCII Table to be returned
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PCL, f T a b l e 0
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The addwf PCL, f instruction (which is shown in Fig. 7.38) adds the contents of w (which is the table value to return that has been passed to the Table subroutine) to the program counter via PCL. When the addwf PCL, f instruction executes, the program counter is already incremented to the next instruction, so to return the T in the table, a value of zero has to be passed in w. To return a, a value of 1 is passed in w and so on. The zero value at the end of Table is used to indicate that the table value has ended. Normally when I am using a text table like this one, I want to have some way of determining when I am at the end of the table; a NUL character (ASCII 0x00) is my usual choice. I like ending a table with 0x00 because when it is ORed with 0x00 or ANDed with 0xFF, the zero ag will be set without changing the value of the contents of WREG.
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w & 0x0F
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Figure 7.38 The addwf PCL, f instruction adds the contents of WREG to the lower 8 bits of the program counter (PCL register) to compute a new execution address.
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The Table subroutine above can be enhanced by using the dt assembler directive (command), which will combine the table s retlw instructions. Using dt, the subroutine becomes:
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Table2: addwf dt ; Return Table Value for Contents of w ; Add the Table Index to the Program Counter
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PCL, f Table , 0
If you were to compare the instructions produced by the Table and Table2 subroutines, you would nd that they are identical, including the number of instructions used by each subroutine. Elsewhere in the book, I describe what directives are and list the entire set available to you for the MPLAB PIC microcontroller assembler that will be used later for experiments and applications. This simple table is useful for many applications, but only under one condition: the table itself has to be located in the rst 256 instructions of the PIC microcontroller s program memory. If the table is not located in the rst 256 instructions or straddles the rst 256 instruction boundary, then execution will jump to an invalid address because the PCLATH register is not correctly set up for the table. To rectify this, the generic table code could be used:
; ; movwf Temp ; movlw HIGH TableEntries ; movwf PCLATH ; movwf Temp, w ; addlw LOW TableEntries ; btfsc STATUS, C incf PCLATH, f ; movwf PCL ; TableEntries: ; dt Table , 0 Table3: Return Table Value for Contents of w Anywhere in PIC microcontroller Memory Save the Table Index Get the Current 256 Instruction Block Store it so the Next Jump is Correct Compute the Offset within the 256 Instruction Block If in next, increment PCLATH Write the correct address to the Program Counter
In this example, I update the PCLATH register according to the starting location of the instructions at TableEntries. When I calculate the address of the actual table element to access, I increment PCLATH if the destination is outside the initial 256 instruction address block. The only problem with Table3 is that it requires a register to store the offset while PCLATH is updated. Conditional assembly directives (which are discussed in Chap. 10) could be used to select the correct bsf and bcf instructions for the 256 address block the table starts in. By using these statements, the table code is one instruction longer than Table3 but does not require a le register:
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