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The second traditional use of nops is to provide space for patch code. Patching code in processors is usually done by replacing instruction locations that have all their bits set with instructions that were placed in line to see how the operation of the application is affected. When PROM, EPROM, EEPROM, and Flash memory technology is ready to be programmed (i.e., cleared) all the cells are set (equal to 1). The programming burns zeros into memory to make the various instructions. To support this, nop instructions consisting of all bits set are often provided within processor instruction sets. The nop cannot be used in the mid-range PIC microcontroller for providing patch memory code space because the nop instruction is all zeros. Despite this, there is a method of providing space in the code for patches in the PIC microcontroller. To do this, there must be unprogrammed code left in the application that can be changed by a programmer. To do this, the reverse of making instructions from nops is used.
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For example, you may put the following code in your mid-range PIC microcontroller application to provide patch code space:
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goto dw dw dw dw dw $ + 6 0x03FFF 0x03FFF 0x03FFF 0x03FFF 0x03FFF ; ; Skip Over ve patch addresses Instruction Word with all bits set
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To enter some patch code, all the 1s in the goto statement must be programmed to 0s, changing the instruction into a nop. The dw 0x03FFF assembler directives (commands) are used because they keep all the bits set at the instruction word where the dw directive is located. The code snippet above will allow you to add up to ve instructions without having to reassemble your code. To add patch code, convert the goto $ + 6 instruction to a nop and then write over the dw statements with the instructions needed for the patch. For example, adding code to invert the contents of w by using xorlw 0x0FF could be accomplished by changing the six instructions above to:
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nop xorlw goto dw dw dw ; ; ; FORMERLY: goto FORMERLY: dw FORMERLY: dw $ + 6 0x03FFF 0x03FFF
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0x0FF $ + 4 0x03FFF 0x03FFF 0x03FFF
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Instructions in PIC microcontroller program memory can be programmed out (erased or turned into nop instructions) very easily, because the nop instruction consists of all the bits set to zero. I should point out that the need for patching memory is just about nonexistent due to the wide availability of Flash-based PIC microcontroller part numbers, which can be completely reprogrammed in the same amount of time as it would take to change the instructions as outlined above. Where you may want to provide patch memory space is in EPROM-based parts, which do not have Flash memory equipped comparable devices.
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The low-end PIC microcontroller s architecture and instruction set can be considered a subset of the mid-range chip. All the low-end instructions are available in the mid-range (with the difference being that the low-end does not have addlw, sublw, ret e, and return) and many of the software methods that were discussed earlier in the chapter can be used on the low-end. The memory spaces (both register and instruction) are smaller
LOW-END PIC MICROCONTROLLER INSTRUCTION SET
than the mid-range devices with fewer bits available for accessing registers. Rather than go through each instruction as I did above, in the following sections I just want to discuss the differences and issues that you will have to deal with working with low-end PIC microcontrollers. A complete table of instructions can be found in App. B. Just so there is no confusion, the low-end PIC microcontroller instruction set is 12 bits wide. The mid-range architecture has 14-bit instructions and the PIC18 instructions are 16 bits wide. I m making this distinction because there is no part number differentiator between the low-end and the mid-range PIC microcontroller architectures (for example, a PIC16C54 is a low-end device and a PIC16C554 is a mid-range device). I nd the best way of determining what processor architecture a device is built with is the width of instructions in bits. To experiment with the low-end architecture, you can use the LEInsTemplate.asm le:
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