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Add Offset to start of table to PCLATH If in Next Page, increment PCLATU
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; Calculate offset within 256 address
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If the purpose of the computed goto is to return a byte value (using retlw), then I would suggest taking advantage of the 16-bit instruction word, store 2 bytes in an instruction word, and use the table read instructions to read back two values. This is somewhat more ef cient in terms of coding and requires approximately the same number of instructions and instruction cycles. A computed byte table read (which allows compressed data) consists of the following subroutine.
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TableRead: movwf TableOff movlw LOW Table addwf TableOff, w, 0 movwf TBLPTRL, 0 movlw (Table >> 8) & 0xFF btfsc STATUS, C, 0 addlw 1 movwf TBLPTRH, 0 movlw UPPER Table btfsc STATUS, C, 0 addlw 1 movwf TBLPTRU, 0 TBLRD * movf TABLAT, w, 0 return Table: db ...
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Interrupts When I show a basic interrupt handler for the mid-range PIC microcon-
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trollers, along with the w and STATUS registers, I also include saving the contents of the FSR and the PCLATH registers. This is not required in the PIC18 because of the
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PIC18 INSTRUCTION SET
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multiple FSR registers available and the ability to jump anywhere within the application without using the PCLATH or PCLATU registers. If an FSR register is required within an interrupt handler, chances are it can be reserved for this use within the application when resources are allocated. When a hardware interrupt request is acknowledged, the current WREG, STATUS, and BSR are saved in the fast stack. The PCLATH (and PCLATU) registers should not have to be saved in the interrupt handler unless a traditional table read (i.e., using a computed goto) is implemented instead of a table read using the built-in instructions (and shown in the previous section). The goto and branch instructions update the program counter without accessing the PCLATH and PCLATU registers. These conditions will allow a PIC18 interrupt handler with context saving to be as simple as:
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org Int ; 8
#### - Execute Interrupt Handler Code ret e 1
so long as nested interrupts are not allowed and subroutine calls do not use the fast stack.
PROCESSOR CONTROL INSTRUCTIONS
The PIC18Cxx has the same processor instructions as the other PIC microcontrollers, but there is one instruction enhancement that I would like to bring to your attention. When designing the PIC18Cxx, the Microchip designers did something I ve wanted for years: they created a nop instruction (Fig. 7.55) that has two bit patterns, all bits set and all
Program Memory
PC Program Counter Stack
Register Space
File Registers
Instruction Bit Pattern: 00000000 00000000 12345678 12345678 or: 12345678 12345678 11111111 11111111 Instruction Operation:
Register Address Bus
STATUS WREG BSR
Fast Stack
Instruction Register/ Decode Second Instruction Register
Notes:There are two bit patterns for this instruction
Flags Affected: None Instruction Cycles: 1
Figure 7.55 The nop instruction is coded as either all bits set or all bits reset.
USING THE PIC MCU INSTRUCTION SET
bits reset. The profoundness of this instruction and what can be done with it will probably not be immediately obvious to you. In the PIC18, just the patch space instructions that are to be modi ed are changed and no space is required for jumping around instructions. For the same example in the PIC18, the patch space would be:
dw dw dw dw dw dw 0x0FFFF 0x0FFFF 0x0FFFF 0x0FFFF 0x0FFFF 0x0FFFF ; ; ; ; ; ; nop nop nop nop nop nop
To add three instructions to the patch space, just the required changes for the three instructions are made:
movf addwf movwf dw dw dw B, w, 0 C, w, 0 A, 0 0x0FFFF 0x0FFFF 0x0FFFF ; ; ; ; ; ; Formerly dw 0x0FFFF Formerly dw 0x0FFFF Formerly dw 0x0FFFF nop nop nop
Note that to add three instructions in this case, only three instructions of the patch space are modi ed and there is no need for a goto instruction to jump around the unprogrammed addresses as you would for the low-end or mid-range PIC microcontroller architectures.
ASSEMBLY-LANGUAGE SOFTWARE TECHNIQUES
The PIC microcontroller is an interesting device for which to write application software. If you have experience with other processors, you probably will consider the PIC microcontroller to be quite a bit different and perhaps even low end if you are experienced with RISC processors. Despite this rst impression, very sophisticated application software can be written for the PIC microcontroller, and if you follow the tricks and suggestions presented in this chapter, your software will be surprisingly ef cient as well. Much of the information I will give you in this book will leave you scratching your head and asking, How could somebody come up with that The answer often lies in necessity the application developer had to implement some features in fewer instructions, in fewer cycles, or using less variable memory ( le registers in the PIC microcontroller). For most of these programming tips, the person who came up with them not only had the need to do them but also understood the PIC microcontroller architecture and instruction set well enough to look for better ways to implement the functions than the most obvious. At the risk of sounding Zen, I want to say that the PIC microcontroller is best programmed when you are in the right head space. As you become more familiar with the architecture, you will begin to see how to exploit the architecture and instructionset features to best implement your applications. The PIC microcontroller has been designed to pass and manipulate bits and bytes very quickly between locations in the chip. Being able to plan your applications with an understanding of the data paths in mind will allow you to write applications that can require as little as one-third the clock cycles and instructions that would be required in other microcontrollers. This level of optimization is not a function of learning the instruction set and some rules. Instead, it is a result of thoroughly understanding how the PIC microcontroller works and being able to visualize the best path for data within the processor and have a feel for the data owing through the chip.
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