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Copyright 2008, 2002, 1997 by The McGraw-Hill Companies, Inc. Click here for terms of use.
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conditionally execute based on the state of any bit in the PIC microcontroller. The PIC microcontroller s capabilities are actually quite a bit more powerful and exible than what you would get with a processor with conditional jumps built in. The problem with them is that they are somewhat more dif cult to learn to use effectively. The requirement for page bit and register setup before interpage jumping is really not that unusual for processors. For example, the 8088, used in the IBM PC, has short, intrasegment, and intersegment jumps, each one giving the application programmer different options for changing execution to a different location anywhere in the system s memory. In the PIC microcontroller, writing jumps that go across page boundaries and require changes to PCLATH and the STATUS registers (depending on the processor architecture) are not that dif cult, but there are some rules that should be followed when doing them. I must point out that the PIC18 architecture does have the ability to jump anywhere in its program memory space and does have some conditional jumps. These instructions are unique to this architecture, but remember that the basic conditional execution instructions and methodology used in the other architectures are implemented in the PIC18, and code written for lower-level devices should work in a PIC18 processor with little, if any, modi cation.
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LowGoto: LOW-END JUMPING BETWEEN PROGRAM MEMORY PAGES
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Low-end devices do not have a PCLATH register, but the page selection bits are in the STATUS register and have to be set or reset according to the page in which the address being jumped to is located. Changing the STATUS page selection bits in lowend devices is really only slightly different from doing it in mid-range s PCLATH register writes, with the majority of the issues being in how the subroutine and table calls work. The LowGoto application can be found in the code\LowGoto folder and is very simple, with only seven instructions executed to jump within the initial page (page 0) and then to jump to and from page 1.
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title LowGoto - Low-End Jumping Around. ; ; In this Application, Jumps Between Device Pages is ; Demonstrated. ; ; ; 99.12.25 - Created for the Second Edition ; ; Myke Predko ; LIST R=DEC INCLUDE p16c5x.inc ; < Note PIC microcontroller is PIC16C56 ; Registers
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; Macros MyLGoto MACRO Label if ((Label & 0x0200) != 0) bsf STATUS, PA0 else bcf STATUS, PA0 endif if ((Label & 0x0400) != 0) bsf STATUS, PA1 else bcf STATUS, PA1 endif goto Label & 0x01FF endm
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; Jump to Label Without Page Selections
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__CONFIG _CP_OFF & _WDT_OFF & _XT_OSC PAGE Mainline of LowGoto 0 Page0Label ; Goto an Address Within the Same Page
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org goto
Page0Label: MyLGoto Page1Label org 0x0200 Page1Label: lgoto Page0Label
Label in Page 0
Label in Page 1
The 16C56 is a low-end PIC microcontroller with 1,024 instructions of EPROM program memory. This is actually two low-end instruction pages and works well for this experiment, as well as for later ones discussing how interpage calls and program counter updates work in low-end devices. The rst thing to note about this experiment is what happens when you click on the PIC Microcontroller Reset icon in MPLAB. If you have set up your LowGoto project as I have shown so far, you ll see that the black highlight line is displayed on the rst goto Page0Label. This is actually what you expect based on your experience with the 16F84 and other mid-range devices. Even though this is what you are used to, it is not 100 percent correct. To show what I mean, add the stopwatch to the application by clicking on Window and then Stopwatch. Notice that after clicking on the Reset Processor icon on the MPLAB
PIC MICROCONTROLLER APPLICATION BASICS
toolbar, the number of cycles shown executed is 1. This shouldn t seem right because before the rst instruction is executed, the timer should be 0. The reason for this discrepancy is how reset works in the low-end PIC microcontroller processors and how I have discussed how applications should be programmed for them. In low-end devices, the reset vector is always the last address of program memory, not the rst, as in the other PIC microcontroller processor families. To make the devices appear more common to the other processor families (with the mid-range family in particular), ignore the last instruction as to when all the bits are set; it is xorlw 0x0FF, which inverts the bits in the w register register. This is not an issue because the value in w register is unde ned at power-up anyway. For the two jumps, the MyLGoto macro sets the PA0 and PA1 bits of the STATUS register according to where the destination label is located. The PA0 bit is set according to the state of bit 9 of the destination address, and PA1 is set according to the state of bit 10 of the destination address. In the MyLGoto macro, instead of setting or resetting these bits according to the label address, I could have used the following code:
movlw (1 << PA0) | (1 << PA1) andlw STATUS, w ; Clear All the Bits But PA0 and PA1 iorlw ((HIGH Label) & 0x006) << 4 movwf STATUS goto (Label & 0x01FF) | ($ & 0x01800) ; Jump to the Address within the Bank
which loads in the contents of the STATUS register, clears PA0 and PA1, and then loads them with the value directly from label. After PA0 and PA1 are set, I then jump to the address within the instruction bank. This method takes twice as many instructions as the method that I used to no advantage over the MyLGoto macro. Actually, I would also say that the method shown above is suboptimal to the macro s version because it is also much harder to understand, and it changes the w register (whereas the macro doesn t). Using the Microchip-supplied lgoto directive is something that you may want to consider in your applications when you are de nitely jumping between banks. The lcall pseudo-instruction is not recommended for use at all because it does not restore the state of the PA0 and PA1 bits (or PCLATH in mid-range devices) after return. I should point out that the lgoto pseudoinstruction should not be used after a conditional skip instruction because it adds extra instructions (which are not seen in the source code) that will affect the operation of skip. Ideally, conditional branching should not take place across pages.
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