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PC = PC + 2 + Label
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bsf Reg, Bit, a
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if ((Reg & (1 << Bit)) == 0) PC = NextIns endif
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if ((Reg & (1 << Bit)) != 0) PC = NextIns endif
1010 bbba ffff ffff
btg Reg, Bit, a
Reg = Reg ^ (1 << Bit)
0111 bbba ffff ffff
bz Label
if (Z == 1) PC = PC + 2 + Label endif PUSH( PC ) if (s ==1) PUSH( W, STATUS, BSR) endif PC = Label
1110 0000 kkkk kkkk
call Label, s
1110 110s kkkk kkkk 1111 kkkk kkkk kkkk
Clear the speci ed register; if a is set, then the BSR is used for Reg, else the access bank is used Clear the watchdog register and STATUS ags
clrf Reg, a
Reg = 0 Z = 1 WDT WDT _TO _PD = 0 Postscaler = 0 = 1 = 1
0110 101a ffff ffff
clrwdt
0000 0000 0000 0100
Complement the contents of the speci ed register; if a is set, then the BSR is used for Reg, else the access bank is used
comf Reg, d, a
if ( d == 0) wreg = Reg ^ 0xFF else Reg = Reg ^ 0xFF endif if ((Reg ^ 0x0FF) == 0x000) Z = 1 else Z = 0 endif if ((Reg ^ 0x0FF) & 0x080) != 0) N = 1 else N = 0 endif if ((Reg - wreg) == 0) PC = NextIns endif
0001 11da ffff ffff
Compare the speci ed register with the w register and skip if the register = w register; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed
cpfseq Reg, a
0110 001a ffff ffff
(Continued )
TABLE B.6 INSTRUCTION
PIC18C INSTRUCTION SET (CONTINUED) FORMAT OPERATION BIT PATTERN
Compare the speci ed register with the w register and skip if the register > w register; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed Compare the speci ed register with the w register and skip if the register < w register; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed Do a decimal adjust after addition of two BCD values Decrement the contents of the speci ed register; if a is set, then Reg is in BSR bank, else access bank is used
cpfsgt Reg, a
if ((Reg - wreg) > 0) PC = NextIns endif
0110 010a ffff ffff
cpfslt Reg, a
if ((Reg - wreg) < 0) PC = NextIns endif
0110 000a ffff ffff
if ((wreg & 0x0F) > 9) wreg = (wreg & 0x0F) + 0x010 endif if ( d == 0) wreg = Reg - 1 else Reg = Reg 1 endif if ((Reg - 1) == 0x000) Z = 1 else Z = 0 endif if (((Reg > 0) & ((Reg - 1) < 0x080)) OV = 1 else
0000 0000 0000 0111
decf Reg, d, a
0000 01da ffff ffff
OV = 0 endif if ((Reg - 1) & 0x080) != 0) N = 1 else N = 0 endif if (((Reg & 0x00F) - 1) & 0x080) != 0) DC = 0 else DC = 1 endif if ((Reg - 1) < 0) C = 0 else C = 1 endif Decrement the contents of the speci ed register and skip the next instruction if result = 0; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed decfsz Reg, d, a if ( d == 0) wreg = Reg - 1 else Reg = Reg 1 endif if ((Reg - 1) == 0x000) PC = NextIns endif if ( d == 0) wreg = Reg - 1 else Reg = Reg 1 endif if ((Reg - 1) != 0x000) PC = NextIns endif 0010 11da ffff ffff
Decrement the contents of the speci ed register and skip the next instruction if result = 0; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed
dcfsnz Reg, d, a
0100 11da ffff ffff
(Continued )
TABLE B.6 INSTRUCTION
PIC18C INSTRUCTION SET (CONTINUED) FORMAT OPERATION BIT PATTERN
Goto the 20-bit label address (two instruction cycles) Increment the contents of the speci ed register; if a is set, then Reg is in the BSR bank, else access bank is used.
goto Label incf Reg, d, a
PC = Label if ( d == 0) wreg = Reg + 1 else Reg = Reg + 1 endif if ((Reg + 1) == 0x000) Z = 1 else Z = 0 endif if (((Reg > 0) & ((Reg + 1) > 0x07F)) OV = 1 else OV = 0 endif if ((Reg + 1) & 0x080) != 0) N = 1 else N = 0 endif if (((Reg & 0x00F) + 1) & 0x010) != 0) DC = 1 else DC = 0 endif if ((Reg + 1) == 0x0100) C = 1
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