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TABLE B.6 INSTRUCTION
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PIC18C INSTRUCTION SET (CONTINUED) FORMAT OPERATION BIT PATTERN
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Subtract the w register from the contents of Reg and C, and store the result according to d result in the w register; If a is set, then Reg is in the BSR bank, else Reg is in the access bank
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subwfb Reg, d, a
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if ( d == 1) wreg = Reg - wreg - !C else Reg = Reg - wreg - !C endif if (((Reg > 0) & (wreg > 0)) & ((Reg - wreg - !C) < 0x080)) OV = 1 else OV = 0 endif if (((Reg - wreg - C) & 0x080) != 0) N = 1 else N = 0 endif if ((Reg - wreg - !C) > 0x0FF) C = 1 else C = 0 endif if (((Reg & 0x0F) - (wreg & 0x0F) - !C) > 0x0F) DC = 1 else DC = 0 endif if (((Reg - wreg - !C) & 0x0FF) == 0x000) Z = 1 else Z = 0 endif
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0101 10da ffff ffff
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Swap the the contents of Reg and store the result according to d result in the w register; if a is set, then Reg is in the BSR bank, else Reg is in the access bank
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swapf Reg, d, a
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if (d == 1) Reg = ((Reg & 0xF0) >> 4) + ((Reg & 0x0F) << 4) else w = ((Reg & 0xF0) >> 4) + ((Reg & 0x0F) << 4) endif switch(Option) case * TABLAT = ProgMem(TBLPTR) case *+ TABLAT = ProgMem(TBLPTR) TBLPTR = TBLPTR + 1 case *TABLAT = ProgMem(TBLPTR) TBLPTR = TBLPTR - 1 case +* TBLPTR = TBLPTR + 1 TABLAT = ProgMem(TBLPTR) switch(Option) case * ProgMem(TBLPTR) case *+ ProgMem(TBLPTR) TBLPTR = TBLPTR case *ProgMem(TBLPTR) TBLPTR = TBLPTR case +* TBLPTR = TBLPTR ProgMem(TBLPTR) if (Reg == 0) PC = NextIns endif
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0011 10da ffff ffff
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Read the program memory contents at the table pointer and execute as option speci es (two instruction cycles)
tablrd Option Option: nn Action 00 * 01 *+ 10 *11 +*
0000 0000 0000 10nn
Write the contents of the table latch into program memory based on the option speci cation pointer; if the destination is internal program memory, the instruction does not end until an interrupt (two instruction cycles or many if program memory EPROM/Flash write)
tablwt Option Option: nn Action 00 * 01 *+ 10 *11 +*
0000 0000 0000 11nn = TABLAT = TABLAT + 1 = TABLAT + 1 + 1 = TABLAT 0110 011a ffff ffff
Compare the speci ed register zero and skip if the register = 0; if a is set, then the BSR is used for Reg, else the access bank is used; one instruction cycle if skip not executed, two if skip executed
tstfsz Reg, a
(Continued )
1012 TABLE B.6 INSTRUCTION PIC18C INSTRUCTION SET (CONTINUED) FORMAT OPERATION BIT PATTERN
XOR a constant to the w register and store the result in the w register
xorlw Constant
wreg = wreg ^ Constant if ((wreg ^ Constant) == 0x000) Z = 1 else Z = 0 endif if ((wreg ^ Constant) & 0x080) != 0) N = 1 else N = 0 endif if ( d == 1) wreg = wreg ^ Reg else Reg = wreg ^ Reg endif if ((wreg ^ Reg) == 0x000) Z = 1 else Z = 0 endif if ((wreg ^ Reg) & 0x080) != 0) N = 1 else N = 0 endif
0000 1010 kkkk kkkk
XOR the w register to the contents of Reg and store the result according to d result in the w register; if a is set, then Reg is in the BSR bank, else Reg is in the access bank
xorwf Reg, d, a
0001 10da ffff ffff
PIC MICROCONTROLLER SUMMARY
after an LCALL statement and the PCLATH bits are not set appropriately for the current page, execution will jump into the LCALL page. For low-end PIC microcontrollers, LCALL should be
bcf/bsf bcf/bsf bcf/bsf STATUS, PA0 STATUS, PA1 STATUS, PA2
TABLE B.7
MICROCHIP SPECIAL MNEMONICS
FUNCTION PROVIDED
Equivalent Instruction addcf Reg, d
Actual Inserted Instructions btfsc STATUS, C incf Reg, d
Function Operation if (C == 1) if (d == 1) Reg = Reg + 1; else w = Reg + 1 if (DC == 1) if (d == 1) Reg = Reg + 1; else w = Reg + 1; PC = ((PCLATH << 8) & 0x01800) + Label; if (C == 1) PC = (PCLATH << 8) & 0x01800) + Label; if (DC == 1) PC = ((PCLATH << 8) & 0x01800) + Label; if (C == 0) PC = ((PCLATH << 8) & 0x01800) + Label; If (DC == 0) PC = ((PCLATH << 8) & 0x01800) + Label; If (Z == 0) PC = ((PCLATH << 8) & 0x01800) + Label; If (Z == 1) PC = ((PCLATH << 8) & 0x01800) + Label; (Continued )
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