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APPENDIX B
TABLE B.7
MICROCHIP SPECIAL MNEMONICS (CONTINUED)
FUNCTION PROVIDED
Equivalent Instruction clrc clrdc lcall Label
Actual Inserted Instructions bcf bcf STATUS, C STATUS, DC
Function Operation C = 0; DC = 0;
Clear carry Clear digit carry Long call do not use, as described above
Low-End: bcf/bsf STATUS, PA0 bcf/bsf STATUS, PA1 bcf/bsf STATUS, PA2 call Label MidRange: bcf/bsf PCLATH, 3 bcf/bsf PCLATH, 4 call Label
Long goto
lgoto Label
Low-End: bcf/bsf STATUS, PA0 bcf/bsf STATUS, PA1 bcf/bsf STATUS, PA2 goto Label Mid-Range: bcf/bsf PCLATH, 3 bcf/bsf PCLATH, 4 goto Label
Load w register with contents of Reg
movfw Reg
movf Reg, w
W = Reg if (Reg == 0) Z = 1; else Z = 0; Reg = Reg ^ 0xFF if (d == 0) w = Reg + 1; else Reg = Reg + 1;
Negate a le register only use if d equals 1 (putting result back into the le register)
negf Reg, d
comf Reg, f incf Reg, d
PIC MICROCONTROLLER SUMMARY
TABLE B.7
MICROCHIP SPECIAL MNEMONICS (CONTINUED)
FUNCTION PROVIDED
Equivalent Instruction setc setdc setz skpc
Actual Inserted Instructions bsf STATUS, C bsf bsf STATUS, DC STATUS, Z
Function Operation C = 1; DC = 1; Z = 1; if (C == 1) PC = PC + 1; if (DC == 1) PC = PC + 1; if (C == 0) PC = PC + 1; if (DC == 0) PC = PC + 1; if (Z == 0) PC = PC + 1; if (Z == 1) PC = PC + 1; Reg = Reg ^ 0x0FF; if (d == 0) w = Reg + 1; else Reg = Reg + 1; if (C == 1) if (d == 1) Reg = Reg - 1; else w = Reg 1; if (DC == 1) if (d == 1) Reg = Reg - 1; else w = Reg - 1; if (Reg == 0) Z = 1; else Z = 0;
Set carry Set digit carry Set zero Skip the next instruction if the carry ag is set Skip the next instruction if the digit carry ag is set Skip the next instruction if the carry ag is reset Skip the next instruction if the digit carry ag is reset Skip the next instruction if the zero ag is reset Skip the next instruction if the zero ag is set Negate a le register
btfss STATUS, C
skpdc
btfss STATUS, DC
skpnc
btfsc STATUS, C
skpndc
btfsc STATUS, DC
skpnz
btfsc STATUS, Z
skpz
btfss STATUS, Z
negf Reg, d
comf Reg, f incf Reg, d
Subtract carry from le register
subcf Reg, d
btfsc STATUS, C decf Reg, d
Subtract digit carry to le register
adddcf Reg, d
btfsc STATUS, DC decf Reg, d
Load Z with1 if contents of Reg equal 0
movfw Reg
movf Reg, f
APPENDIX B
call bsf/bcf bsf/bcf bsf/bcf
(Label & 0x1FF) + ($ & 0xE00) STATUS, PA0 STATUS, PA1 STATUS, PA2
and for mid-range devices, LCALL should be
bcf/bsf bcf/bsf call bsf/bcf bsf/bcf PCLATH, 3 PCLATH, 4 (Label & 0x7FF) + ($ & 0x1800) PCLATH, 3 PCLATH, 4
negf never should be used unless the destination is back into the le register source. If the destination is the w register, note that the contents of the le register source will be changed with the complement of the value. Because of this added complexity, use of this special instruction is not recommended.
I/O Register Addresses
The different PIC microcontroller architecture families each have a set of registers at speci c addresses. These conventions allow code to be transferred between PIC MCUs designed with the same processors very easily. Over the past few years, the register labels have been made as similar as possible and match the MPASM assembler codes to ensure that applications can be ported between devices within and without the current PIC microcontroller architecture family. While the register addresses are very similar between PIC microcontrollers of the same architecture family, remember that the bits in the different registers may change function with different PIC microcontroller part numbers. To be absolutely sure of the bits and their function inside a register, consult the Microchip part datasheet. The register addressing information contained in the rest of this appendix is provided to give you a reference on how the different PIC microcontroller family architecture s registers are addressed.
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