ssrs 2016 barcode Figure 10.18 Solution for Example 10.3. in Software

Generation QR Code JIS X 0510 in Software Figure 10.18 Solution for Example 10.3.

Figure 10.18 Solution for Example 10.3.
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The [C/N0] ratio is then used in the link budget calculations, as described in Chap. 12. With purely digital systems, the BER will be directly reflected in errors in the data being transmitted. With analog signals which have been converted to digital form through PCM, the BER contributes to the output signal-to-noise ratio, along with the quantization noise, as described in Sec. 10.3. Curves showing the contributions of thermal noise and quantization noise to the signal-to-noise output for analog systems can be seen in Fig. 10.19. The signal-to-noise power ratio is given by (Taub and Schilling, 1986) S N Q 1
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(10.25)
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Figure 10.19 (a) Use of optimum terminal filter to maximize the signal-tonoise voltage ratio; (b) plot of Eq. (10.25).
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where Q 2n is the number of quantized steps, and n is the number of bits per sample. The BER can be improved through the use of error control coding. This is the topic of Chap. 11. 10.7 Carrier Recovery Circuits To implement coherent detection, a local oscillator (LO) that is exactly synchronized to the carrier must be provided at the receiver. As shown in Sec. 10.6.1, a BPSK signal is a double sideband suppressed carrier (DSBSC) type of signal, and therefore, the carrier is not directly available in the BPSK signal. The carrier can be recovered using a squaring loop, as shown in Fig. 10.20. Consider first the situation where the input is a BPSK signal. The frequency multiplier is a nonlinear circuit, which squares the signal. Squaring Eq. (10.14) results in e2(t) p2(t) cos2 p2(t)a 1 2
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1 cos 2 2
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(10.26)
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Note that with p(t) equal to 1, the square is just 1. The bandpass filter following the frequency multiplier is tuned to the carrier second harmonic, which provides one of the inputs to the phase detector of the phase-locked loop. The voltage-controlled oscillator (VCO) in the phase-locked loop (PLL) operates at the carrier frequency. The second frequency multiplier provides the second harmonic of this as the other input to the phase detector. The phase difference between these two inputs generates a bias voltage that brings the frequency of the VCO into synchronism with the carrier frequency as derived from the BPSK signal.
Frequency multiplier xm
Phase detector
BPSK m = 2 QPSK m = 4
Frequency multiplier xm
Recovered carrier
Functional block diagram for carrier recovery.
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With QPSK, the signal can be represented by the formulas given in Table 10.1, which may be written generally as n b (10.27) 4 Quadrupling this, followed by some trigonometric simplification, results in e(t) 22 cosa
e (t)
2 cos 2a
n b 4
1 cos 4a 2
n b 4
(10.28)
The last term on the right-hand side is selected by the bandpass filter and is 1 cos 4a 2
n b 4
1 cos(4 2
(10.29)
This is seen to consist of the fourth harmonic of the carrier, including a constant-phase term that can be ignored. The fourth harmonic is selected by the bandpass filter, and the operation of the circuit proceeds in a similar manner to that for the BPSK signal. Frequency multiplication can be avoided by use of a method known as the Costas loop. Details of this, along with an analysis of the effects of noise on the squaring loop and the Costas loop methods, will be found in Gagliardi (1991). Other methods are also described in detail in Franks (1980).
10.8 Bit Timing Recovery Accurate bit timing is needed at the receiver in order to be able to sample the received waveform at the optimal points. In the most common arrangements, the clocking signal is recovered from the demodulated waveform, these being known as self-clocking or self-synchronizing systems. Where the waveform has a high density of zero crossings, a zero-crossing detector can be used to recover the clocking signal. In practice, the received waveform is often badly distorted by the frequency response of the transmission link and by noise, and the design of the bit timing recovery circuit is quite complicated. In most instances, the spectrum of the received waveform will not contain a discrete component at the clock frequency. However, it can be shown that a periodic component at the clocking frequency is present in the squared waveform for digital signals (unless the received pulses are exactly rectangular, in which case squaring simply produces a dc level for a binary waveform). A commonly used baseband scheme is
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