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MUTUAL INDUCTANCE AND TRANSFORMERS
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Circuit Analysis Using Spice and PSpice
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15.1 SPICE AND PSPICE Spice (Simulation Program with Integrated Circuit Emphasis) is a computer program developed in the 1970s at the University of California at Berkeley for simulating electronic circuits. It is used as a tool for analysis, design, and testing of integrated circuits as well as a wide range of other electronic and electrical circuits. Spice is a public domain program. Commercial versions, such as PSpice by MicroSim Corporation, use the same algorithm and syntax as Spice but provide the technical support and addons that industrial customers need. This chapter introduces the basic elements of Spice/PSpice and their application to some simple circuits. Examples are run on the evaluation version of PSpice which is available free of charge.
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CIRCUIT DESCRIPTION
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The circuit description is entered in the computer in the form of a series of statements in a text le prepared by any ASCII text editor and called the source le. It may also be entered graphically by constructing the circuit on the computer monitor with the Schematic Capture program from MicroSim. In this chapter, we use the source le with the generic name SOURCE.CIR. To solve the circuit, we run the circuit solver on the source le. The computer puts the solution in a le named SOURCE.OUT.
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EXAMPLE 15.1 Use PSpice to nd the dc steady-state voltage across the 5-mF capacitor in Fig. 15-1(a).
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CHAP. 15]
CIRCUIT ANALYSIS USING SPICE AND PSPICE
We rst label the nodes by the numbers 0, 1, 2 and the elements by the symbols R1, R2, C, and Vs [Fig. 15-1(b)]. We then create in ASCII the source le shown below and give it a name, for instance, EXMP1.CIR. DC analysis, Fig. Vs R1 R2 C .END 15-1 1 0 1 2 0 2 0 2 DC 3k 6k 5 uF 9V
Executing the command PSPICE EXMP1, the computer solves the circuit and writes the following results in the le EXMP1.OUT. NODE VOLTAGE NODE (1) 9.0000 (2) VOLTAGE SOURCE CURRENTS NAME CURRENT Vs 1:000E 03 TOTAL POWER DISSIPATION VOLTAGE 6.0000
9:00E 0:3 WATTS
The printed output speci es that the voltage at node 2 with reference to node 0 is 6 V, the current entering the voltage source Vs is 10 3 A, and the total power dissipated in the circuit is 9 10 3 W.
DISSECTING A SPICE SOURCE FILE
The source le of Example 15.1 is very simple and contains the statements necessary for solving the circuit of Fig. 15-1 by Spice. Each line in the source le is a statement. In general, if a line is too long (over 80 characters), it can be continued onto subsequent lines. The continuation lines must begin with a plus ( ) sign in the rst column. PSpice does not di erentiate uppercase and lowercase letters and standard units are implied when not speci ed. We will use both notations. Title Statement The rst line in the source le of Example 15-1 is called the title statement. This line is used by Spice as a label within the output le, and it is not considered in the analysis. Therefore, it is mandatory to allocate the rst line to the title line, even if it is left blank. .END Statement The .END statement is required at the end of the source le. Any statement following the .END will be considered a separate source le. Data Statements The remaining four data statements in the source le of Example 15.1 completely specify the circuit. The second line states that a voltage source named Vs is connected between node 1 (positive end of the source) and the reference node 0. The source is a dc source with a value of 9 V. The third line states that a resistor named R1 , with the value of 3 k
, is connected between nodes 1 and 2. Similarly, the fourth and fth lines specify the connection of R2 (6 k
) and C (5 mF), respectively, between nodes 0 and 2. In any circuit, one node should be numbered 0 to serve as the reference node. The set of data statements describing the topology of the circuit and element values is called the netlist. Data statement syntax is described in Section 15.4. Control and Output Statements In the absence of any additional commands, and only based on the netlist, Spice automatically computes the dc steady state of the following variables: (i) Node voltages with respect to node 0.
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