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The inverting ampli ers, summing circuits, and integrators described in the previous sections are used as building blocks to form analog computers for solving linear di erential equations. Di erentiators are avoided because of considerable e ect of noise despite its low level. To design a computing circuit, rst rearrange the di erential equation such that the highest existing derivative of the desired variable is on one side of the equation. Add integrators and ampli ers in cascade and in nested loops as shown in the following examples. In this section we use the notations x 0 dx=dt, x 00 d 2 x=dt2 and so on.
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EXAMPLE 5.20 Design a circuit with x t as input to generate output y t which satis es the following equation: y 00 t 2y 0 t 3y t x t Step 1. Rearrange the di erential equation (27) as follows: y 00 x 2y 0 3y 28 27
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Step 2. Use the summer-integrator op amp #1 in Fig. 5-28 to integrate (28). Apply (24) to nd R1 ; R2 ; R3 and C1 such that output of op amp #1 is v1 y 0 . We let C1 1 mF and compute the resistors accordingly: R1 C1 1 R1 1 M
R2 C1 1=3 R2 333 k
R3 C1 1=2 R3 500 k
v1 x 3y 2y 0 dt y 00 dt y 0
29
Step 3. Integrate v1 y 0 by op amp #2 to obtain y. We let C2 1 mF and R4 1 M
to obtain v2 y at the output of op amp #2. 1 v2 dt y 0 dt y 30 v2 R4 C2 Step 4. Supply inputs to op amp #1 through the following connections. Feed v1 y 0 directly back to the R3 input of op amp #1. Pass v2 y through the unity gain inverting op amp #3 to generate y, and then feed it to the R2 input of op amp #1. Connect the voltage source x t to the R1 input of op amp #1. The complete circuit is shown in Fig. 5-28. EXAMPLE 5.21 Design an op amp circuit as an ideal voltage source v t satisfying the equation v 0 v 0 for t > 0, with v 0 1 V. Following the steps used in Example 5.20, the circuit of Fig. 5-29 with RC 1 s is assembled. The initial condition is entered when the switch is opened at t 0. The solution v t e t , t > 0, is observed at the output of the op amp.
CHAP. 5]
AMPLIFIERS AND OPERATIONAL AMPLIFIER CIRCUITS
Fig. 5-28
Fig. 5-29
LOW-PASS FILTER
A frequency-selective ampli er whose gain decreases from a nite value to zero as the frequency of the sinusoidal input increases from dc to in nity is called a low-pass lter. The plot of gain versus frequency is called a frequency response. An easy technique for nding the frequency response of lters will be developed in 13. The leaky integrator of Fig. 5-24 is a low-pass lter, as illustrated in the following example.
EXAMPLE 5.22 In Example 5.18 let v1 sin ! t. Find jv2 j for ! 0; 10; 100; 103 ; 104 , and 105 rad/s. By repeating the procedure of Example 5.18, the frequency response is found and given in Table 5-1. response amplitude decreases with frequency. The circuit is a low-pass lter.
Table 5-1. Frequency Response of the Low-pass Filter !, rad/s f , Hz jv2 =v1 j 0 0 1 10 1.59 1 100 15.9 0.995 103 159 0.707 104 1:59 103 0.1 105 15:9 103 0.01
AMPLIFIERS AND OPERATIONAL AMPLIFIER CIRCUITS
[CHAP. 5
COMPARATOR
The circuit of Fig. 5-30 compares the voltage v1 with a reference level vo . Since the open-loop gain is very large, the op amp output v2 is either at Vcc (if v1 > vo ) or at Vcc (if v1 < vo ). This is shown by v2 Vcc sgn v1 vo where sgn stands for sign of. For vo 0, we have  Vcc v1 > 0 v2 Vcc sgn v1 Vcc v1 < 0
Fig. 5-30 EXAMPLE 5.23 In Fig. 5-30, let Vcc 5 V, vo 0, and v1 sin !t. Find v2 . For 0 < t < =!, v1 sin !t > 0 For =! < t < 2=!, v1 sin !t < 0 v2 5 V One cycle of v2 is v2 5 V
The output v2 is a square pulse which switches between 5 V and 5 V with period of 2=!. given by  5V 0 < t < =! v2 5 V =! < t < 2=!
EXAMPLE 5.24 The circuit of Fig. 5-31 is a parallel analog-to-digital converter. The Vcc and Vcc connections are omitted for simplicity. Let Vcc 5 V, vo 4 V, and vi t (V) for 0 < t < 4 s. Find outputs v3 ; v2 ; and v1 . Interpret the answer. The op amps have no feedback, and they function as comparators. The outputs with values at 5 or 5 V are given in Table 5-2.
Table 5-2 time, s 0<t<1 1<t<2 2<t<3 3<t<4 input, V 0 < vi 1 < vi 2 < vi 3 < vi <1 <2 <3 <4 v3 v3 v3 v3 5 5 5 5 outputs, V v2 v2 v2 v2 5 5 5 5 v1 v1 v1 v1 5 5 5 5
The binary sequences fv3 ; v2 ; v1 g in Table 5-2 uniquely specify the input voltage in discrete domain. However, in their present form they are not the binary numbers representing input amplitudes. Yet, by using a coder we could transform the above sequences into the binary numbers corresponding to the values of analog inputs.
CHAP. 5]
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