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CHARACTERISTICS OF BIPOLAR JUNCTION TRANSISTORS
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Applying KVL around the left base loop gives VEE IBQ1 RB VBEQ1 iE RE IEQ1 R VBEQ1 2IEQ1 RE 1 1 B 3
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Solving (3) for 2IEQ1 RE , substituting the result into (2), and solving for IEQ1 yield I EQ1 and, by (3), RE VEE VBEQ1 RB I 1 1 EQ1 15 0:7 10 103 1:18 10 3 60 1 5:97 k 2 1:18 10 3 1 1 VCC VCEQ1 VBEQ1 60 1 15 8 0:7 1:18 mA 1 RC RB 60 6:8 103 10 103
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The Si transistor of Fig. 3-23 has negligible leakage current, and 100. VEE 4 V; RE 3:3 k, and RC 7:1 k, nd (a) IBQ and (b) VCEQ .
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Fig. 3-23 (a) By KVL around the base-emitter loop, IEQ Then, by (3.1) and (3.2), IBQ (b) KVL and (2) of Problem 3.17 yield   VCEQ VCC VEE IEQ RE ICQ RC VCC VEE RE RC IEQ 1   100 3 3 3 15 4 3:3 10 7:1 10 1 10 8:67 V 100 1 IEQ 1 10 3 9:9 A 1 100 1 VEE VBEQ 4 0:7 1 mA RE 3:3 103
For the transistor circuit of Fig. 3-23, CC 100 F, RE 3:3 k; RC 8:1 k; RL 15 k, VCC 15 V; VEE 4 V, and vS 0:01 sin 2000t V. The transistor can be described by the generic npn model. Use SPICE methods to (a) determine the quiescent voltage VCEQ and (b) plot the input and output currents and voltages.
(a) The netlist code below describes the circuit.
CHAP. 3]
CHARACTERISTICS OF BIPOLAR JUNCTION TRANSISTORS
Prb3_24.CIR - CB amplifier vs 1 0 SIN(0V 10mV 1kHz) CC1 1 2 100uF RE 2 4 3.3kohm VEE 0 4 4V Q 3 0 2 QNPNG RC 3 5 8.1k VCC 5 0 15V CC2 3 6 100uF RL 6 0 15kohm .MODEL QNPNG NPN(Is=10fA Ikf=150mA Isc=10fA Bf=150 + Br=3 Rb=1ohm Rc=1ohm Va=30V Cjc=10pF Cje=15pF) .DC VCC 15V 15V 1V .PRINT DC V(3,2) .TRAN 1us 1ms .PROBE .END
After executing hPrb3_24.CIRi, examine the output le to nd VCEQ V 3; 2 7:47 V. VCEQ VCC =2, the transistor is biased for maximum symmetrical swing.
Since
(b) Use the Probe feature of PSpice to plot the input and output currents and voltages as displayed by Fig. 3-24. Notice that this circuit ampli es the output voltage while the output current is actually less in amplitude than the input current.
Fig. 3-24
Find the proper collector current bias for maximum symmetrical (or undistorted) swing along the ac load line of a transistor ampli er for which VCEsat ICEO 0.
For maximum symmetrical swing, the Q point must be set at the midpoint of the ac load line. Hence, from (3.13), we want   1 1 VCEQ ICQ iC max ICQ 1 2 2 Rac
CHARACTERISTICS OF BIPOLAR JUNCTION TRANSISTORS
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But for a circuit such as that in Fig. 3-9(a), KVL gives VCEQ % VCC ICQ Rdc 2
which becomes an equality if no emitter resistor is present. Substituting (2) into (1), assuming equality, and solving for ICQ yield the desired result: ICQ VCC Rac Rdc 3
In the circuit of Fig. 3-8(a), RE 300 ; RC 500 ; VCC 15 V; 100, and the Si transistor has -independent bias. Size R1 and R2 for maximum symmetrical swing if VCEsat % 0.
For maximum symmetrical swing, the quiescent collector current is ICQ 1 VCC 15 9:375 mA 2 RE RC 2 300 500 Then, RE 100 300 3 k 10 10
Standard practice is to use a factor of 10 as the margin of inequality for independence in (3.8). RB and, from (3.7), VBB % VBEQ ICQ 1:1RE 0:7 9:375 10 3 330 3:794 V Equations (3.5) may now be solved simultaneously to obtain RB 3 103 4:02 k 1 VBB =VCC 1 3:794=15 V 15 R2 RB CC 3 103 11:86 k 3:794 VBB R1
In the circuit of Fig. 3-10(a), the transistor is a Si device, RE 200 ; R2 10R1 10 k, RL RC 2 k; 100, and VCC 15 V. Assume that CC and CE are very large, that VCEsat % 0, and that iC 0 at cuto . Find (a) ICQ , b VCEQ , c the slope of the ac load line, (d) the slope of the dc load line, and (e) the peak value of undistorted iL .
(a) Equations (3.5) and (3.7), give RB so ICQ 1 103 10 103 1 103 909  and VBB 15 1:364 V 3 11 103 11 10 VBB VBEQ 1:364 0:7 3:177 mA % RB = 1 RE 909=101 200
(b) KVL around the collector-emitter circuit, with ICQ % IEQ , gives VCEQ VCC ICQ RE RC 15 3:177 10 3 2:2 103 8:01 V c Slope 1 1 1 1 2 1 mS Rac RC RL 2 103
d (e)
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