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RB = > RE so that its collector current ICQ is signi cantly sensitive to changes in the value of . Use SPICE methods to determine the worst-case change in ICQ due to a 50 percent change in the value of . The transistor parameter list in the .MODEL statement must be modi ed from that of Example 5.9 to add the DEV=50% immediately following Bf=150 as shown in the netlist code that follows:
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Ex5_10.CIR VBB 0 1 -1.32V VCC 0 4 -15V RB 1 2 35kohm RC 3 4 5kohm RE 5 0 200ohm Q 3 2 5 QNPNG .MODEL QNPNG NPN(Is=10fA Ikf=150mA Isc=10fA Bf=150 + DEV 50% Br=3 RB=1ohm Rc=1ohm Va=75V Cjc=10pF Cje=15pF) .DC VCC -15V -15V 1V .WCASE DC IC(Q) YMAX DEVICES Q .END
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Execute hEx5_10.CIRi and poll the output le to nd the worst-case deviation is a 495 A reduction of ICQ which occurs for 75 or for 50 percent of the nominal value of . Due to the nonlinear nature about the point of operation, the deviation for 225 or for 150% of the nominal value of was the lesser deviation. The particular value of ICQ for 225 can be determined by changing YMAX to MIN in the .WCASE statement, executing hEx5_10.CIRi, and examining the output le.
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5.1 Leakage current approximately doubles for every 108C increase in the temperature of a transistor. If a Si transistor has ICBO 500 nA at 258C, nd its leakage current at 908C.
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ICBO 500 10 9 2 90 25 =10 500 10 9 90:51 45:25 A
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Sketch a set of common-emitter output characteristics for each of two di erent temperatures, indicating which set is for the higher temperature.
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The CE collector characteristics of Fig. 3-3(c) are obtained as sets of points IC ; VCE from the ammeter and voltmeter readings of Fig. 3-3(a). For each xed value of IB ; IC IB 1 ICBO must increase with temperature, since ICBO increases with temperature (Problem 5.1) and is much less temperature sensitive than ICBO . The resultant shift in the collector characteristics is shown in Fig. 5-4.
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In the circuit of Fig. 3-13, a transistor that has 1 is replaced with a transistor that has 2 . (a) Find an expression for the percentage change in collector current. (b) Will collector current increase or decrease in magnitude if 2 > 1 Neglect leakage current.
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(a) By KVL, VCC IBQ RB VBEQ IEQ RE Using (3.2) and (3.4) in (1) and rearranging lead to VCC VBEQ RB RE ICQ RE ICQ 2 1
TRANSISTOR BIAS CONSIDERATIONS
[CHAP. 5
iC T2 > T1 T1 iB = 40 mA iB = 60 mA
iB = 20 mA
iB = 0
Fig. 5-4
This equation may be written for the original transistor (with 1 and ICQ ICQ1 and for the replacement transistor (with 2 and ICQ2 ). Subtracting the former from the latter then gives   ICQ2 ICQ1 0 RB RE 3 RE ICQ2 ICQ1 2 1 If we de ne ICQ2 ICQ1 ICQ , then (3) can be rewritten as 0 RB RE 1 ICQ1 ICQ 2 ICQ1 RE ICQ 1 2
which, when rearranged, gives the desired ratio: ICQ 1 RB RE 2 100% 1 RB 2 1 RE ICQ1 (b) By inspection of (4), it is apparent that ICQ is positive for an increase in 2 > 1 . 4
Use SPICE methods to show the sensitivity of and VBEQ as the operating temperature ranges from 0 to 1258C if the transistor is the npn device of Example 5.9.
The netlist code that follows establishes the desired sweep of temperature with IBEQ Ib set at a reasonable value of 150 A.
Prb5_4.CIR Ib 0 1 150uA Q 2 1 0 QNPNG VC 2 0 15V .MODEL QNPNG NPN(Is=10fA Ikf=150mA Isc=10fA Bf=150 + Br=3 Rb=1ohm Rc=1ohm Va=75V Cjc=10pF Cje=15pF) .DC TEMP 0 125 5 .PROBE .END
After executing hPrb5_4.CIRi, use of the Probe feature of PSpice allows plotting of versus temperature and VBEQ versus temperature as shown by Fig. 5-5. Inspection of the plot shows that the variation of with temperature is signi cantly less than 1%/8C, supporting the implication of Section 5.2 that it is the unit-to-
CHAP. 5]
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