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Fig. 7-8 The dc load line, with the same intercepts as in Example 4.7, is superimposed on the characteristics of Fig. 7-8; however, because the plate characteristics are di erent from those of Example 4.7, the quiescent values are now IPQ 11:3 mA and VPQ 186 V. Then a time axis on which to plot vG 4 2 sin !t V is constructed perpendicular to the dc load line at the Q point. Time axes for iP and vP are also constructed as shown, and values of iP and vP corresponding to particular values of vG t are found by projecting through the dc load line, for one cycle of vG . The result, in Fig. 7-8, shows that vP varies from 152 to 218 V and iP ranges from 8.1 to 14.7 mA.
The following treatment echoes that of Section 6.2 For the usual case of negligible grid current, (4.7) degenerates to iG 0 and the grid acts as an open circuit. For small excursions (ac signals) about the Q point, iP ip and an application of the chain rule to (4.8) leads to ip iP % diP where we have de ned 1 v gm v g rp p 7:8
CHAP. 7]
SMALL-SIGNAL MIDFREQUENCY FET AND TRIODE AMPLIFIERS
@vP vP @iP Q iP Q @i i Transconductance gm  P P @vG Q vG Q Plate resistance rp 
7:9 7:10
Under the condition iG 0, (7.8) is simulated by the current-source equivalent circuit of Fig 7-9(a). The frequently used voltage-source model of Fig. 7-9(b) is developed in Problem 7.19.
ip +
rp _ mLg +
gm L g
_ K (a)
_ K (b)
Fig. 7-9 Triode small-signal equivalent circuits
Solved Problems
(a) For the JFET ampli er of Example 4.2, use the drain characteristics of Fig. 4-6 to determine the small-signal equivalent-circuit constants gm and rds . (b) Alternatively, evaluate gm from the transfer characteristic.
(a) Let vgs change by 1 V about the Q point of Fig. 4-6(b); then, by (7.3), 3 iD 3:3 0:3 10 1:5 mS gm % vGS Q 2 At the Q point of Fig. 4-6(b), while vDS changes from 5 V to 20 V, iD changes from 1.4 mA to 1.6 mA; thus, by (7.4), vDS 20 5 rds % 75 k iD Q 1:6 1:4 10 3 (b) At the Q point of Fig. 4-6(a), while iD changes from 1 mA to 2 mA, vGS changes from 2:4 V to 1:75 V; by (7.3), 3 iD 2 1 10 1:54 mS gm % vGS Q 1:75 2:4
Derive the small-signal voltage-source model of Fig. 7-1(b) from the current source model of Fig. 7-1(a).
We nd the Thevenin equivalent for the network to the left of the output terminals of Fig.7-1(a). If all independent sources are deactivated, vgs 0; thus, gm vgs 0, so that the dependent source also is deacti vated (open circuit for a current source), and the Thevenin resistance is RTh rds . The open-circuit voltage
SMALL-SIGNAL MIDFREQUENCY FET AND TRIODE AMPLIFIERS
[CHAP. 7
appearing at the output terminals is vTh vds gm vgs rds vgs , where we have de ned a new equivalent-circuit constant, Amplification factor   gm rds Proper series arrangement of vTh and RTh leads to Fig. 7-1(b).
In the drain-feedback-biased ampli er of Fig. 4-9(a), RF 5 M; RL 14 k; rds 40 k; and gm 1 mS. Find (a) Av vds =vi ; b Zin ; c Zo looking back through the drain-source terminals, and (d) Ai ii =iL .
(a) The voltage-source small-signal equivalent circuit is given in Fig. 7-10. With vds as a node voltage, vi vds vds vds vi RF RL rds
ii RF iL
rds + _ RL mLi = mLgs +
Fig. 7-10 Substituting for  gm rds and rearranging yield Av vds RL rds 1 RF gm RF rds RL rds RL RF vi 14 103 40 103 1 5 106 1 10 3 10:35 5 10 40 103 14 103 40 103 14 103 5 106
(b) KVL around the outer loop of Fig. 7-10 gives vi ii RF vds ii RF Av vi , from which Zin (c) vi RF 5 106 440 k ii 1 Av 1 10:35 With vi 0,
The driving-point impedance Zo is found after deactivating the independent source vi . vgs vi 0 and Zo rds RF 40 103 5000 103 39:68 k rds RF 5040 103
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