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Two forms of switch fabric have emerged as acceptable solutions to the ATM speed dilemma. Time-division multiplexing is the simplest fabric to implement; in time-division systems, all cells are transmitted across a shared medium usually either across a common bus or an array of shared memory between the input and output ports. Both techniques work well, although the shared-memory systems are typically faster than those that employ the shared-bus architecture. The shared bus, however, is less expensive to implement. The second form of switch fabric relies on space-division multiplexing, a technique in which large numbers of paths exist between input and output arrays. In what are called self-routing systems, the input controllers attach a routing tag to each cell using the same table lookup that they use to perform the VPI/VCI translations. Each element in the switch, then, uses the tag to route the cell accordingly. In label-based routing, the VPI/VCI label is used to select specific routing tables within each element of the switch fabric. In theory, these work well and are non-blocking; however, they don t scale particularly well and are therefore not as efficient as self-routing switches. Another issue that ATM switches must contend with is cell buffering. It is a well-known fact that although the provisioning of more buffers results in less cell loss and congestion, it also results in greater delay. Efficiency of use also plays a key role, so the method used to assign available buffers to cell streams is critical. In internally buffered systems, memory is provided within the switch fabric so that the input and output queues share the available buffer pool. This results in a very efficient model, but although it is scalable, it has some difficulties providing cell prioritization and multicasting. In externally-buffered systems, memory is physically located at either the input or output ports, or both. When input queuing is implemented, the buffer space is allocated at the ingress point, whereas with output queuing the buffers are placed on the egress side. Output queuing is generally considered to be more efficient and can be improved through the use of shared buffers, in which all output queues have access to a shared chunk of available memory. A feedback loop is provided for contention management purposes. Other characteristics of ATM switches include management of switching delay and throughput, the number of user interfaces and ports available, AAL and QoS support, support for both permanent and demand virtual channels, point-to-multipoint support, congestion control across the network, and a number of other options.
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All in all, the technology behind ATM switch architectures is reasonably mature and improves routinely. The number of players in the manufacturing sector continues to grow, and as both the market requirements and the underlying technology are better understood, the switch business has become quite competitive, leading to a variety of reliable, innovative, and capable products to choose from.
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The players on the ATM field include the edge and backbone switch manufacturers, as well as the service providers themselves. The ATM switch market has segmented itself into two product areas: the edge switches, which are analogous to local central office switches in the telephony domain, and core switches, which are the equivalent of tandem switches. Edge switches, as their name implies, are located at the edge of the network, and as such provide the access point for users entering the network. They fall into two categories. True ATM edge switches permit the connection of non-ATM devices to the network, whereas ATM access switches are designed to enable other ATM devices to connect. Among others, Lucent, Nortel, and 3Com all manufacture edge switches, with reasonably similar features. All offer support for a wide variety of media and LAN schemes, as well as ATM access ports and support for multiple virtual LANs. The price per port varies somewhat, but not unreasonably so. Furthermore, these switches support a wide (and growing) variety of ATM features, such as IP over ATM, LANE, ATM UNI, and the full complement of service levels such as ABR, CBR, UBR, and so on. In the LAN environment, these switches support traditional Ethernet, Fast Ethernet, Gigabit Ethernet, and typically rely on bus architectures within the switch. Core or backbone switches, on the other hand, which are the tandem switches of the ATM realm, are quite a bit more robust than the edge switches, with throughput as high as 13 Gbps. The price-per-port is comparable to that of the edge switches, but the feature and services complement that they offer is somewhat expanded. In addition to the features supported by the edge switches, ATM core switches also support LAN emulation client and server, flow priority control, and extensive network management capabilities. Leading switch manufacturers in the marketplace include Lucent, Cisco, and IBM, among others.
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