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8 THE BASIC STAMP 2
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TABLE 1-2 WORD NAME
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Input pins, word, byte Output pins, word, byte nibble and bit addressable I/O pin direction, control word, byte, nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable General purpose, word, byte nibble and bit addressable
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B2 B3
B4 B5
B6 B7
B8 B9
B10 B11
B12 B13
B14 B15
B16 B17
B18 B19
B20 B21
B22 B23
B24 B25
ALTERNATIVE STAMP 2 9
TABLE 1-3 PIN NAME
BASIC STAMP 2 PINOUTS FUNCTION DESCRIPTION
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21
SOUT SIN ATN VSS P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 P10 P11 P12 P13 P14 P15 VDD
Serial out Serial out Attention Ground User I/O 0 User I/O 1 User I/O 2 User I/O 3 User I/O 4 User I/O 5 User I/O 6 User I/O 7 User I/O 8 User I/O 9 User I/O 10 User I/O 11 User I/O 12 User I/O 13 User I/O 14 User I/O 15 Regulator out
Temporarily connects to PCs (RX) Temporarily connects to PCs (TX) Temporarily connects to PCs (DTR) Temporarily connects to PCs ground User ports which can be used for inputs or outputs.
Output mode: Pins will source from Vdd . Pins should not be allowed to source more than 20 mA, or sink more than 25 mA. As groups, P0 P7 and P8 P15 should not be allowed to source more than 40 mA or sink more than 50 mA.
Input mode: Pins are floating (less tan 1 A leakage).The 0/1ogic threshold is approx. 1.4 V.
Note: To realize low power during sleep, make sure that no pins are floating, causing erratic power drain. Either drive then to Vss or Vdd , or program them as outputs that don t have to source current.
. Output from 5-V regulator (Vin powered). Should not be allowed to source more than 50 mA, including P0 P15 loads. Power input (Vin not powered). Accepts 4.5 to 5.5 V. Current consumption is dependent on run/sleep mode and I/O. When low, all I/Os are inputs and program execution is suspended. When high, program executes from start. Goes low when Vdd is less than 4 V or ATN is greater than 1.4 V. Pulled to Vdd by a 4.7-k resistor. May be monitored as a brownout/reset indicator. Can be pulled low externally (i.e., button to Vss ) to force a reset. Do not drive high. Ground. Located next to Vin for easy battery backup. Input to 5-V regulator. Accepts 5.5 to 15 V. If power is applied directly to Vdd , pin may be left unconnected.
Power in
Reset I/O
23 24
VSS VIN
Ground Regulator in
Figure 1-7 Parallax NX1000 protoboard.
Figure 1-8 STAMP 2 and a simple carrier board.
ALTERNATIVE STAMP 2 11
Figure 1-9 STAMP 2 supercarrier board.
The cost of the OEM version is between those of the original STAMP 2 and the alternative STAMP 2. Note that the designation OEM is an indication that Parallax s intent is that you might use this board as a drop-in board in an overall new system design. In this book we chose to utilize the STAMP 2 (BS2-IC) instead of the cheaper PIC chips, since most of the projects in this book are works in progress and features can be added at any time in the future. You can build the alternative STAMP 2 on a protoboard, perfboard, carrier board, or your own custom printed circuit board. By utilizing protoboards, you ensure that your designs are fluid and can be easily changed on the fly, until you complete and debug your project. The perfboard method of construction uses point-to-point wiring between components. Components are soldered to wires that interconnect. This method of construction is more permanent than protoboard construction, but can be modified by resoldering and repositioning. Carrier board construction is quite similar to perfboard construction and can be modified more easily than a printed circuit board. Printed circuit boards are generally used when design is complete, or finalized and debugged, and when neatness or mass production is important. The design of the alternative STAMP 2 requires you to supply your own 5-V regulator in order to power the BASIC interpreter, memory, and serial communications chip. You would need to supply a 5-V regulator, such as LM7805, as shown in Fig. 1-13 at U4. The 5-V regulator can be supplied with power from a 9- to 12-Vdc wall wart power supply, or you could build your own power supply. A heat sink on the regulator is advisable, in order to dissipate heat properly. When you are constructing the alternative STAMP 2, be sure to observe the correct polarity when you install the four 1- F electrolytic capacitors and the diode at D1. Note that the switch S1 is used to reset the microprocessor if a program stalls. The alternative
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