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R7 2.49K
C1 3.3N
7 11
R4 5.49K X6 TL431 R3 2.49K
Schematic of a low-dropout regulator.
The zero that is added by the compensation is at a frequency of 1 = 19,000 Hz 2 (2.49k)(3.3 nF) Because the bandwidth is relatively low, the high-frequency pole from Ciss is not canceled. If greater bandwidth is necessary, this pole may be canceled via the placement of a small capacitor across the 5.49-k divider resistor. Note that this circuit requires a bias voltage for the MOSFET gate that is at least several volts greater than the output voltage. In most power converters, this bias voltage is available. In cases where the bias voltage is not available, a CMOS charge pump circuit is often used to generate it. The circuit shown in Fig. 6.1 was used to simulate the transient response, turn-on, headroom, and ripple rejection performance of the lowdropout regulator. The results are shown in Fig. 6.2.
LDO: LOW DROPOUT REGULATOR .AC DEC 10 100HZ 1000KHZ .DC V2 5 10 .1 .TRAN 1U 1M 500u UIC .PROBE V(11)= +8 .PRINT AC V(11) VP(11) .PRINT DC V(11) .PRINT TRAN V(11)
Low-Dropout Linear Regulator
x 8.09 < 7.99
+8 in Volts
V2 in Volts
Headroom measurement graph.
V1 4 0 15 R3 7 0 2.49K R4 7 11 5.49K R5 11 0 8 V2 2 0 9 AC 1 X5 2 1 11 IRF140 X6 6 0 7 TL431 R6 1 6 1K C1 3 7 3.3N R7 3 6 2.49K I1 11 0 PWL 0 0 500U 0 510U 2 750U 2 + 760U 0 C2 11 0 33U R2 1 4 10K .END
The headroom measurements indicate that the dropout voltage (the minimum voltage across the pass element) at 1 A is 90 mV. The use of a MOSFET with a lower on-resistance will further reduce the headroom. Transient Response The graph in Fig. 6.3 shows the response to a 2-A step load. The circuit has a recovery time of approximately 50 s and a transient impedance of 10 m .
Six
+8 in Volt
550U
650U
750U
850U
950U
Time in Secs
Response curve generated by a 2-A step change in the load.
+8v in dB (Volts)
FREQUENCY in Hz
Frequency domain ripple rejection analysis results.
Low-Dropout Linear Regulator
+8 in Volts
20.0U
60.0U
100.0U
140U
180U
Time in Secs
Transient turn-on response of the linear regulator.
Ripple Rejection The ability of the linear regulator to reject input perturbations (such as ripple) is shown in Fig. 6.4. This characteristic is equivalent to the CS-0X audio susceptibility requirements of the military standard MILSTD 461. The ripple rejection is primarily a function of the closed-loop bandwidth of the regulator. Figure 6.5 shows the transient turn-on response of the linear regulator. Control Loop Stability Feedback stability is an important issue for all closed-loop systems. The simple modi cation that has been added to the circuit in Fig. 6.1 (L1, C3) allows us to measure the open-loop gain and phase of the system while the circuit loop is still closed (see Fig. 6.6). This method is very similar to the method used by most modern network analyzers, such as the Veneable and the Hewlett Packard model 3577.
LDO2: LOW DROPOUT .AC DEC 10 100HZ 1MEG .PROBE V(8)= +8 .PRINT AC V(8) VP(8) V(1) VP(1) V1 7 0 15
Six
R2 3 0 2.49K R3 3 4 5.49K R4 8 0 8 V2 2 0 9 X1 2 1 8 IRF140 X2 5 0 3 TL431 R5 1 5 1K C1 6 3 3.3N R6 6 5 2.49K C2 8 0 33U C3 4 9 1 L1 8 4 1 V3 9 0 AC 1 R1 1 7 10K .END
Figure 6.7 shows the Bode plot of the feedback loop. The graph indicates a 7.5-kHz bandwidth with a phase margin of nearly 90 and a gain margin of 45 dB. The simulation results of the MOSFET LDO are very much dependent on the accurate representation of the MOSFET Gfs over the operating load current range. In many cases the models provided by manufacturers (which are also the models included in many SPICE program model libraries) may not accurately represent this parameter. The next example is a similar regulator, designed to provide 2.5V output at up to 1 A. The simulations were performed with two
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