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A typical three-terminal regulator.
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At very low currents, an upper resistance limit may be imposed due to the use of a base-emitter resistor. The overall resistance, including these limits, is de ned by the term Reff . The effect of this Reff is to combine with the output capacitor, resulting in a frequency pole in the feedback path that is de ned by Fpole = 1 2 Reff C out
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This frequency pole is in addition to the typical dominant pole compensation of the voltage regulator, which results in conditional stability of the voltage feedback loop. This additional pole is further complicated by the fact that it has a load-dependent corner frequency and also that it is proportional to load capacitance. Devices may also vary
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X2 LM317TI V1
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V1 28
R1 220
C1 10u
R3 2.2k
R2 3.9k
LM317 Three-terminal regulator test circuit.
Low-Dropout Linear Regulator
LM317 three-terminal regulator test circuit response.
from manufacturer to manufacturer because the internal feedback loop characteristics are generally not speci cation controlled. The use of a MOSFET in place of a BJT has a similar effect, but Shockley s equation does not apply. The effective resistance of the MOSFET device is typically much greater than that of the BJT. An example circuit, shown in Fig. 6.18, was constructed. A 0- to 100-mA step load was applied in addition to the 2.2K resistor load in order to see the effects of the moving frequency pole and the poor resulting phase margin.
LM317TI.cir .TRAN 1u 10m 0 10u .PRINT TRAN V(1) .PROBE C1 1 0 10u R1 1 2 220 R2 2 0 3.9k R3 1 0 2.2k V1 3 0 DC=28 I1 1 0 PULSE 0 .1 2m 1u 1u 5m 10m X2 3 2 1 AEILM317TI .END
Six
Plot1 v1 in volts
24.0 1 23.0
1.00m
3.00m
5.00m Time in Secs
7.00m
9.00m
LM317 Three-terminal regulator simulated response.
Three-terminal regulator test circuit with 2.2K load.
Low-Dropout Linear Regulator
The measured step load response is shown in Fig. 6.19, and the SPICE model simulation result is shown in Fig. 6.20. Although the models do not agree all that well, both the measured result and the simulated result indicate poor stability. The loop gain of the test circuit was measured with only the 2.2K load resistor. The measured result is shown in Fig. 6.21.
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DC-to-AC Conversions
Although most of this book has been dedicated to the modeling and simulation of DC-to-DC converters, there are applications such as uninterruptible power supplies (UPS) that convert a DC input voltage to a sinusoidal AC output voltage. The basis of the conversion is very similar to that of the conversion of a DC input voltage to a DC output voltage. One of the more dif cult aspects of DC-to-AC conversion is obtaining a regulated, low-distortion sine-wave reference. Several example circuits that demonstrate different techniques for generating sine-wave references are contained in this chapter.
Using SPICE to Generate a Sine ROM The following example demonstrates an unusual task for SPICE. This example is the result of an actual design for a three-phase sine-wave reference (only one phase is shown). The circuit simulates a single-bit pulse code representation of a sine wave. The implementation is accomplished using a microprocessor that generates a 4-bit word. One bit is used for each of the three-phase references, while the fourth bit is used to generate a synchronization pulse that is required by other circuits. The microprocessor functions as a crystal oscillator and counter. This implementation allows the microprocessor to support functions such as programmable frequency, which are used to support 50-, 60-, and 400-Hz outputs. Much of the protection circuitry is also realized by the microprocessor. The fundamental problem is the generation of a bit pattern for the sine-wave reference. The circuit in Fig. 7.1 shows a novel approach for generating the bit pattern for a single phase. The same circuit is easily extended to three phases (or any other number of phases).
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