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The speed of signal propagation is inversely proportional to the square root of the dielectric constant of the substrate materials, requiring designers to be aware of the dielectric properties of the substrate materials they intend to use. The signal propagation on the substrate between chips, the so-called time of flight, is directly proportional to the length of the conductors and must be kept short to ensure the optimal electrical performance of a system operating at high speeds. For systems operating at speeds above 25 MHz, the interconnections must have transmission line characteristics to minimize signal losses and distortion. Proper design of such transmission lines requires careful calculation of the conductor and dielectric separation dimensions and their precise manufacture to ensure the expected accuracy of performance. For PWBs, there are two basic transmission line types: 1. Stripline 2. Microstrip (for details, see Chap. 15)
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Power Consumption As the clock rates of the chips increase and as the number of gates per chip grows, there is a corresponding increase in their power consumption. Some chips require up to 30 W of power for their operation. With that, more and more terminals are required to bring power in and to accommodate the return flow on the ground planes. About 20 to 30 percent of chip terminals are used for power and ground connections. With the need for electrical isolation of signals in high-speed systems operation, the count may go to 50 percent. Design engineers must provide adequate power and ground distribution planes within the multilayer boards (MLBs) to ensure efficient, low-resistance flow of currents, which may be substantial in boards interconnecting high-speed chips consuming tens of watts and operating at 5 V, 3.3 V, or lower. Proper power and ground distribution in the system is essential for reducing di /dt switching interference in high-speed systems, as well as for reducing undesirable heat concentrations. In some cases, separate bus-bar structures have been required to meet such high power demands.
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Thermal Management All the energy that has been delivered to power integrated circuits (ICs) must be efficiently removed from the system to ensure its proper operation and long life. The removal of the heat from a system is one of the most difficult tasks of electronic packaging. In large systems, huge heat-sink structures, dwarfing the individual ICs, are required to air-cool them, and some computer companies have built giant superstructures for liquid cooling of their computer modules. Some computer designs use liquid immersion cooling. Still, the cooling needs of large systems tax the capabilities of existing cooling methods. The situation is not that severe in smaller, tabletop or portable electronic equipment, but it still requires packaging engineers to ameliorate the hot spots and ensure longevity of operation. Since PWBs are notoriously poor heat conductors, designers must carefully evaluate the method of heat conduction through the board, using such techniques as heat vias, embedded metal slugs, and conductive planes.
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Electronic Interference As the frequency of operation of electronic equipment increases, many ICs, modules, or assemblies can act as generators of radio frequency (RF) signals. Such electromagnetic interference (EMI) emanations can seriously jeopardize the operation of neighboring electronics
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ELECTRONIC PACKAGING AND HIGH-DENSITY INTERCONNECTIVITY
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or even of other elements of the same equipment, causing failures, mistakes, and errors, and must be prevented. There are specific EMI standards defining the permissible levels of such radiation, and these levels are very low. Packaging engineers, and especially PWB designers, must be familiar with the methods of reducing or canceling this EMI radiation to ensure that their equipment will not exceed the permissible limits of this interference. 2.4.5 System Operating Environment The selection of a particular packaging approach for an electronic product is also dictated by its end use and by the market segment for which that product is designed. The packaging designer has to understand the major driving force behind the product use. Is it cost driven, performance driven, or somewhere in between Where will it be used for instance, under the hood of a car, where environmental conditions are severe, or in the office, where the operating conditions are benign The IPC2 has established a set of equipment operating conditions classified by the degree of severity, which are listed in Table 2.1. 2.4.5.1 Cost. The universal digitization of most electronic functions led to the merger of consumer, computer, and communication technologies. This development resulted in the increased appeal of electronics and the need for mass production of many electronic products. Thus, product cost has become the most important criterion in any design of electronic systems. While complying with all the aforementioned design and operation conditions, the design engineer must keep cost as the dominant criterion, and must analyze all potential trade-offs in light of the best cost/performance solution for the product.
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TABLE 2.1 Realistic Representative-Use Environments, Service Lives, and Acceptable Cumulative-Failure Probabilities for Surface-Mounted Electronics by Use Categories Worst-case use environment Use category 1 Consumer 2 Computers 3 Telecomm 4 Commercial aircraft 5 Industrial & automotive (passenger compartment) Tmin, C 0 +15 40 55 55 Tmax, C +60 +60 +85 +95 +95 T,* C 35 20 35 20 20 &40 &60 &80 40 &60 35 tD, h 12 2 12 12 12 12 12 12 12 12 1 12 40 2 2 1 1 1 2 Cycles/ year 365 1460 365 365 185 100 60 20 100 265 8760 365 2 365 365 365 1000 300 40 Years of service 1 3 5 7 20 20 10 Acceptable failure risk, % 1 0.1 0.01 0.001 0.1
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