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3 2 7 8 SERIN K CLOCK OUT1 STROBE OUT2 OE OUvT3 OUT4 OUT5 OUT6 OUT7 OUT8 SEROUT 5841A 10 18 17 16 15 14 13 12 11 6
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3 2 7 8 K SERIN CLOCK OUT1 STROBE OUT2 OE OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 SEROUT 5841A 10 18 17 16 15 14 13 12 11 6
1 2 3 4 5 6 7 8 9 10
U$4G$1
3 2 7 8 K SERIN CLOCK OUT1 STROBE OUT2 OE OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 SEROUT 5841A 10 18 17 16 15 14 13 12 11 6
1 2 3 4 5 6 7 8 9 10
FIGURE 18.6 Product schematic drawing (for components, signals, and interconnections) as sent by the product electrical designer to the PCB editor. There are four 18-pin logical components having SERIN (serial in) and eight output (out1-out8) pins each connected to output connectors (JP1-JP4) and to an input connector JP5 and a ground connection with three capacitors.
PAD1
SERIN K CLOCK OUT1 STROBE OUT2 OE OUT3 OUT4 OUT5 OUT6 OUT7 OUT8 SEROUT
10 18 17 16 15 14 13 12 11 6
1 2 3 4 5 6 7 8 9 10
PAD2
U$1G$1
INFORMATION FORMATING AND EXCHANGE
DATA EXCHANGE FORMATS
This section describes the most widely used data exchange formats in the electronics industry according to a common list of characteristics. Advantages and disadvantages of each format are discussed.
Format Types and Their Characteristics There are several format families differentiated by their origins, properties, and usage. They fall into four categories:
Historical file collections Full-design databases Component information (BOM and AVL) Formats that support full design to manufacturing
18.3.1.1 Historical File Collections. The historical file collection that is used to transfer design data is composed of three file types:
Graphic image formats Gerber 274D and 274X2 belong to this group (see Section 18.3.2.1). (There are other formats in this group, most of which are used internally within CAM systems and as archive formats within bare-board fabrication facilities. Pentax format, DaiNippon Screen, and MDA Autoplot belong to this group.) Most of these formats originated as a photo-plotter machine language; they describe single, graphic (drill, drawing), two-dimensional layers. They are usually accompanied by drill files indicating drill locations and diameters. The main drawbacks to graphic image formats are that they represent single layers rather than whole PCBs and that they cannot be verified unless accompanied by a netlist file. Netlist A netlist presents a list of net numbers, and for each net a list of points by their x and y coordinates, and the surface upon which they can be found (see Fig. 18.7). This is the basic information representing PCB connectivity against which PCB graphics can be verified
327LDIN_47 317LDIN_47 327LDIN_47 317LDIN_47 Signal LDIN_47 IC52 U5 IC10 J2
IC52 VIA IC10 VIA
-U5 -J2 -
A01X+110078Y+030997X0200Y MD0100PA00X+110274Y+031194X0230Y A01X+134371Y+039414X0200Y MD0100PA00X+134174Y+039217X0230Y
R180 R180
FIGURE 18.7 Example of a netlist: (a) this part represents a physical netlist with x and y coordinates (the first line translates as Pin U5 of component IC52 is connected to net LDIN_47 and is at location [11.0078, 3.0997] ; (b) this part represents the same netlist but at schematic stage with only component and pin names; the electric signal identified as LDIN_47 connects IC52 pin V5 to IC10 pin J2 through two vias.
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and from which a test program for an electrical test machine can be constructed. One type of netlist identifies the locations of the nets that the PCB is designed to implement.Another type of netlist is a CAD software design package schematic netlist that identifies connectivity between components (by component and pin number as an input/output [I/O] pin identifier), but does not identify their physical location. Component information In addition to being part of the historical file collection, BOM and AVL files are also part of an independent file class that is required even when the more advanced formats are used (see Section 18.3.5).
18.3.1.2 Full-Design Database: CAD Formats. Full-design databases, which are formatted using either the CAD system database format or American Standard Code for Information Interchange (ASCII)* extracts thereof, represent information for the component and their connectivity through the board as hierarchical arrangements of nets and subnets broken into traces, vias, and planes. They are transferred for board assembly and test but not for board fabrication. Because OEMs consider these formats to present a proprietary information security risk, they often prefer to convey inferior quality information using other formats in order to preserve privacy. 18.3.1.3 Explicit Design for Manufacturing Formats. Formats for full design for manufacturing were explicitly built for design-to-manufacturing data exchange and contain nearly all of the required computer-readable data elements in a well-designed, explicit, intelligent layout. Some of these formats originated as DFM/CAM vendor formats whereas others were designed by an industry association committee. 18.3.1.4 Component Information: BOM and AVL. A PCA may be designed for more than one product variant and to support future functionality. Therefore, for almost all designs, some of the reference designators (or actual bare board footprints on which components can be placed) will not be populated for all assembled board orders. BOM files are used to tell the assembler which reference designators should actually be placed on a given board for a specific order. The separation between electrical functionality of components and their actual procurement leads to the need for an AVL file. CAD databases usually contain part numbers that represent functionality and are internal to the design organization rather than part numbers (including the vendor and catalog number) that customers can order. Component engineers are charged with finding true part numbers to implement the internal ones, and this information is usually organized in spreadsheets or text files called AVLs or approved component lists (ACLs).
Historical File Formats Descriptions Each format description that follows includes its domain (the elements that are covered), its history and expected future path, distinctive characteristics, and a short example. Format description references can be found at the end of the chapter. 18.3.2.1 Gerber (274D and 274X), Drill and Readme. Gerber formats are the lowest common denominator for passing bare-board fabrication information.They are composed of one file per graphic layer, one file for each drill layer, text files that list the PCB stack-up, and optional drawing files that list critical dimensions and requirements. Inclusion of a netlist file with each Gerber transfer is imperative to ensure correct board fabrication.
* See http://www.lookuptables.com/.
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