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Comp. to gold fingers Component to tooling hole Component to mounting hole Hole under component Uncapped via under component No orientation indication Component uncommon orientation Wrong orientation indication No square pad on THMT pin #1 Chip edge protection missing Chip corner protection missing Comp. outside keep-in area Comp. within keep-out area Comp. exceed max height Comp. under min height Component to exposed via Trace under component Comp. to reference designator Comp. without reference designator
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Shadowing of inline components Shadowing of staggered components Toeprint to v-cut rout Toeprint to conveyed edge Toeprint to conveyed edge Toeprint to conveyed Edge Toeprint to break tab rout Exposed Via to exposed toeprint Irregular exposed toeprint Via to toeprint masked trace Testpoints/via Clusters Nonuniform SMD pads size
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Nets with one testpoint Nets without testpoints Nets with multiple testpoints Via capped on both sides Uncapped nontestpoint vias Testpoint to conveyed edge Testpoints outside keep-in area Testpoint to silkscreen Testpoints within keep-out area Nets with missing testpoints Nets with necessary testpoints Nets with extra testpoints Net testpoint summary Net testpoint count report
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Direct connection to plane No clearance in plane ET pin without PTH MP pin on PTH Edge to edge Missing hole Extra holes Pin too large Pin too small Pin touching No pad for pin Multiple pads for pin Pin center to pad heel Pin center to pad toe min Pin center to pad heel min Pin center to pad toe max Pin diameter vs. hole diameter Large pin right distance max (rect. pins) Large pin toe distance vs. heel distance (rect. pins) (continued)
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TABLE 20.6 Checklist of Various Assembly and Test Analyses That Need to Be Performed in Tooling (Continued) A. Fiducial analysis B. Component analysis Misplaced reference designator Wave solder component orientation Component relative orientation C. Padstack analysis D. Testpoint analysis E. Solder paste analysis Large pin left distance vs. right distance (rect. pins) Pin diameter/pad diameter min (%) Pin diameter/pad diameter min (abs) Large pin diameter/ pad diameter min (%) Large pin diameter/pad diameter min (abs) Pin diameter/pad diameter max (%) Pin diameter/pad diameter max (abs) Large pin diameter/pad diameter max (%) Large pin diameter/pad diameter max (abs) Max pin width/pad width min (%) (rect. pins)
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(Source: Valor Computerized Systems)
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MANUFACTURING INFORMATION, DOCUMENTATION
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Component analysis SMT components can have a multitude of missing, incorrect, or incomplete characteristics or properties. Component analysis looks for these potential problems, such as one component extending under another component. Table 20.6b provides a typical checklist for such an analysis. Padstack analysis SMT components have critical toeprints (TPs) and need to be checked with respect to vias, planes, solder mask, fabrication edges, and gold fingers. Table 20.6c shows a checklist for a typical analysis. Testpoint analysis SMT components need to be tested by in-circuit test (ICT).These analysis check testpoints to vias, surface features, tooling holes, and electrical nets. See Table 20.6d for a typical checklist for testpoint analysis. Solder paste analysis SMT components have to be soldered correctly. This is the second most important aspect of assembly, just behind placing the right part in the right place. Many checks are necessary to ensure manufacturability, as seen in Table 20.6e.
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The benefits of performing a comprehensive and thorough assembly analysis include the following:
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Estimation of cost can be derived from the results of the analysis. Manufacturing defects can be identified and corrected prior to construction on the assembly line. Such analysis can help detect potential problems so that any necessary reworking can be implemented early in the design process. Each analysis category is governed by a set of engineering reference file (ERF) values, usually unique to each production facility, thereby supporting full job portability between different assembly sites.
The design rule checking results are reviewed against the PCB or assembly manufacturing capability matrix, with dispositions being made to the acceptability of violations.The PCB and assembly customer may be contacted regarding design violations; the designer may need to send corrected designs or to allow design changes to be performed by the PCB manufacturer or assembler. Additionally, the factors reviewed during the initial design review are revisited to confirm the results based on design actuals. If differences are noted, product yields and/or cost predictions may need to be altered. When issues are addressed during the fabrication or assembly stage, the design database may not get updated to reflect vital changes, thus compromising the integrity of the design. If the design is respun in the future, this issue might be overlooked, resulting in scrap, or worse, faulty boards. 20.6.3 Single-Image Edits Almost all designs include information that must be removed before they can be manufactured. Most of these items of information are used as references during the PCB layout phase to assist the designer in understanding the available real estate. However, these references must be removed or modified in order to manufacture the board to design intent. Among these typical items are the following: Item NPTH pads on outerlayers Routing crop marks Direct contact plane markings of drilled holes Clip nomenclature withsolder mask data Scaling and compensation Impact if not removed/modified Plated holes Copper at board edge Open circuits Nomenclature on pads or in holes Finished traces or geometries that are the wrong size
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