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1. Radovsky, U.S. Patent 3,099,608, 1963. 2. Morrissey, et al. (Amp/Akzo), U.S. Patent 4,683,036, July 1987. 3. Okabayashi (STS), U.S. Patent 4,933,010, June 1990. 4. Gulla, et al. (Shipley), U.S. Patent 4,810,333, March 1989. 5. Holtzman, et al. (APT), U.S. Patent 4,891,069, January 1990. 6. Stamp, et al. (Atotech), PCT WO 93/17153, September 1993. 7. Minten, et al. (MacDermid), U.S. Patent 4,724,005, February 1988. 8. Thorn, et al. (Electrochemicals), U.S. Patent 5,389,270, February 1995. 9. Blasberg, Europatent 0489759. 10. Bressel, et al., U.S. Patent 5,183,552, 1993.
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PWB MANUFACTURE USING FULLY ELECTROLESS COPPER
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31.1 FULLY ELECTROLESS PLATING
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Fully electroless plating has been recognized as a viable technology for some time. It is especially useful for the formation of fineline conductors and considered excellent for plating small, high-aspect-ratio holes because of its high throwing power when compared with that of galvanic plating (see Fig. 31.1). However, its use was limited to the manufacture of doublesided and simple multilayer printed wiring boards (PWBs) for some time after the commercial introduction of the additive process called CC-4 began at Photocircuits Corporation in 1964. This was due to some relatively poor physical properties of electrolessly deposited copper, such as elongation of 2 to 4 percent, compared to 10 to 15 percent achieved by galvanically deposited copper. The view on electroless plating technology began to change in the mid-1970s when IBM decided to utilize the technology for the fabrication of multilayer boards (MLBs) to package its then top-of-the-line mainframe computers.1 IBM and other PWB makers using fully electroless copper plating have continuously improved the properties of electrolessly deposited copper since the early 1980s. IBM has continued to use the technology for the fabrication of more advanced MLBs for mainframe and supercomputers.2,3 Stimulated by IBM s work, and because of technical necessity, NEC Corporation and Hitachi Ltd. of Japan also applied electroless plating technology for the fabrication of MLBs for their mainframe and supercomputers.4,5 Today, electrolessly deposited copper is considered as reliable as galvanically deposited copper, and fully electroless plating technology is finding its way to many applications.6 20 In this chapter, we will discuss various methods of PWB fabrication by means of fully electroless copper-plating technology. PWB fabrication technology using electroless plating is often referred to as additive technology. Therefore, throughout this chapter, the words electroless and additive will be used interchangeably. Electroless copper plating for through-hole metallization, which deposits a thin film of copper on the wall of plated-through-holes (PTHs), typically from 0.3 to 3 mm thick, is a technology different from the one under consideration and will not be discussed in this chapter (see Chap. 29, Electroplating ).
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Copyright 2008 by The McGraw-Hill Companies. Click here for terms of use.
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FIGURE 31.1 Ability of electroless bath to plate hole of high aspect ratio without reducing throwing power.
THE ADDITIVE PROCESS AND ITS VARIATIONS
There have been many variations to additive processes,20,21 but there are three basic additive processes commercially practiced, as illustrated in Fig. 31.2: 1. Pattern-plating additive 2. Panel-plate additive 3. Partly additive methods
PATTERN-PLATING ADDITIVE
Pattern-plating additive methods can be classified further into three different approaches, as described in the following sections, depending on the base substrates used.
Catalytic Laminate with CC-4 *22 CC-4 stands for copper complexer number 4, EDTA, the fourth complexing agent successfully tried by Photocircuits in the early 1960s for full-build electroless copper-plating solution. Over time, the term CC-4 has been used frequently as an adjective, such as in CC-4 process or CC-4 bath. 31.3.1.1 Process Steps. The CC-4 process starts with catalytic laminates coated with catalytic adhesive. The process sequence is as follows: 1. Catalytic base laminate coated with catalytic adhesive (both sides) 2. Hole formation
* CC-4 is a registered trademark of AMP-AKZO Corporation.
FIGURE 31.2
Variation of additive process.
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3. Mechanical abrasion of the adhesive surfaces for better adhesion of plating resist 4. Application of plating resists (screening ink or dry film resist) 5. Formation of microporous structure of exposed adhesive surfaces by chemical etching in acid solution (CrO3/H2SO4 or CrO3/HBF) 6. Fully electroless copper deposition on the conductor tracks and hole walls 7. Panel baking 8. Application of solder mask and legends 9. Final fabrication and test 31.3.1.2 Resist Issues. When the conductor width is 8 mil (0.2 mm) or wider, image transfer (step 4) for a majority of CC-4 boards is still done by screen printing with thermally curable or UV-curable ink, since the cost of imaging by screening method is less than one-third that of dry film imaging. The plating resist is permanent; that is, it stays permanently as an integral part of the board. UV-curable ink is preferred because of its shorter curing time that tends to minimize lateral ink flow while being cured. Lateral ink flow narrows the conductor width since the conductor is formed in the trench between plating resists. See Fig. 31.3.
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