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FIGURE 40.31 A hot-air shroud that is used to simultaneously reflow all of the solder joints on a BGA package. (Courtesy of OK International.)
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minimized to prevent damage to the more fragile Cu bond pads and nearby traces as well as to the laminate itself. This procedure is typically performed manually. The third step in the rework process is the assembly of the new component to the circuit board. Here, the circuit board site is exposed to the third of three solder reflow cycles. Also, it is at this point that semiautomated or automated rework capabilities can be particularly advantageous when compared to a manual operation. First, there is the step of providing solder to the joint pads. The presence of other components precludes the use of stencil or screenprinting dispensing techniques. Although solder preforms are a viable approach for components of larger I/Os, the most versatile and repeatable method for surface-mount components is dispensing paste through a syringe. This method may be performed manually when the number of I/O are relatively small. However, for particularly small passive components, fine-pitch peripheral leaded packages, and area-array devices, automated solder paste dispensing is the preferred technique to control both position and paste quantity. In the case of some BGA and DCA/FC components, there may not be the need for additional solder. Only a flux is dispensed on the Cu pads prior to the component placement step. The tackiness of the flux anchors the part in place prior to reflow soldering. Next, the new component is placed on the circuit board. The extent of rework placement automation depends on the mix of components. Specific variables include the package type (a passive chip device, a QFP with leads, an area-array package, etc.); the package size and its fragility, which determine handling requirements; and the number and pitch of the interconnections. At one extreme, manual assembly procedures are well suited for large leadless chip resistors and capacitors (generally sizes >1206 English) as well as LCCCs and peripherally leaded packages having pitches as small as 0.4 mm. Smaller components, particularly passive chip devices having sizes less than or equal to 0402 (English) are best placed by the mechanical handling and positioning capabilities of a rework station. At the other extreme are the 1.0 mm, high I/O count area-array packages. In these cases, the fine ball pitch, coupled with the inability to position the underside balls accurately over the circuit board pad, nearly always requires some level of automation to ensure the correct placement of the component. After placement of the component, the soldering process is performed to make the joints. Irrespective of the exact method whether it is hot gas or a soldering iron, or the extent of automation the overall objective should be that the time-temperature profile resemble as closely as possible the process used to make the original solder joints. The solder paste is the same as that used in the initial assembly process. As a result, each step, from the preheat stage
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to melting of the solder and subsequent cooling sequence, must be controlled to minimize defects in the rework solder joints. The cleaning step can be eliminated by the use of no-clean or low-solids fluxes in the rework procedure, whether the flux is used alone or is contained in the solder paste. However, if a flux was used that requires that the residues must be removed, some precautions must be followed. In the case of a circuit board product that was reworked immediately following the initial assembly process, one can use the same cleaning steps used in that original process again by simply passing the circuit board through the cleaning cycle a second time. On the other hand, in the case of hardware that is typically built-up further by next-assembly steps, additional materials compatibility concerns must be addressed with respect to the cleaning solutions. For example, it may be necessary to apply the cleaning materials only to the immediate location of the rework activity, avoiding otherwise sensitive materials elsewhere on the circuit board. As noted previously, the two general concerns that must be addressed regarding Pb-free solder rework are higher soldering temperatures and the mixing of Sn-Pb and Pb-free solders for fielded electronics. By comparison to through-hole technology, both issues are amplified in surface-mount technology. Surface-mount components have greater temperature sensitivity due to the materials used in their construction as well as their smaller size. Multilayer chip capacitor ceramics are particularly prone to cracking under thermal shock conditions caused by too fast of a heating ramp or too fast of a cooling rate. In the case of area-array packages, excessively high temperatures cause the larger packages to warp or potato chip. In the extreme cases, warpage can cause opens between the solder ball and pad due to an increased gap or result in short circuits caused by a shortened gap that compresses the solder balls, allowing neighbors to contact one another. The second concern is that of mixing Pb-free solders with a Sn-Pb solder residue that may remain on the circuit board after removal of the defective component. Again, this issue pertains primarily to field-return hardware that had a legacy of Sn-Pb solder. The levels of Pb contamination are potentially higher in the smaller, surface-mount solder joints than they are in through-hole interconnections, so that the impact of Pb on melting point depression, solderability, and, more importantly, long-term reliability is similarly more significant. This concern is acute with Bi-bearing, Pb-free solders, especially those with greater than 5 wt. percent Bi, in which the formation of a low-melting-temperature (96 C) Sn-Pb-Bi ternary phase can potentially degrade long-term reliability. However, studies indicate that simply exercising due diligence with current pad-cleaning techniques will remove Sn-Pb residue to an extent that such effects are minimal. The consequence of unnecessarily subjecting the pad to additional heating cycles to remove all traces of Sn-Pb solder is damage to the Cu/laminate bond, which can result in a loss of electrical reliability. When there is a likelihood that a significant amount of Pb contamination (generally >5 wt. percent Pb) will remain in the Pb-free interconnection, ensuring a minimal impact on longterm reliability requires that the Pb be completely intermixed throughout the interconnection. Under the circumstance when the Pb is not completely distributed in the joint, two distinct microstructures are created: one that is Pb-rich, and the other in which Pb is absent. This condition is of particular concern with BGA and CSP solder joints. The boundary between the two segregated microstructures is weakened with respect to thermal mechanical fatigue failure, thereby potentially reducing the reliability of the interconnection.
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